Received-SPF: pass (google.com: domain of linux-kernel+bounces-87191-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) client-ip=2604:1380:45e3:2400::1;
Precedence: bulk
MIME-Version: 1.0
References: <20240229084555.43701-2-arturas.moskvinas@gmail.com>
 <CAMRc=MfTo7MnfMhRQsjeFsLv3yjEtP0C3ytqACN+nuGw0Sr-Bg@mail.gmail.com>
 <15e6e45f-7398-4703-8154-35e769bac94a@gmail.com> <CAMRc=Mf__-sbAV0xuC2hsxm_-kQWqgxSLRYLKqt9-ce+8_Kf_w@mail.gmail.com>
 <f9e90eb2-60e5-4ae8-9f3f-92922294e981@gmail.com>
In-Reply-To: <f9e90eb2-60e5-4ae8-9f3f-92922294e981@gmail.com>
From: Bartosz Golaszewski <brgl@bgdev.pl>
Date: Thu, 29 Feb 2024 18:39:23 +0100
Message-ID: <CAMRc=MfSO_RbrU672WV8MnfRoPJbkJwa4q+7p++6sZf-x3LGOA@mail.gmail.com>
Subject: Re: [PATCH v2] gpio: 74x164: Enable output pins after registers are reset
To: Arturas Moskvinas <arturas.moskvinas@gmail.com>
Cc: andriy.shevchenko@linux.intel.com, linus.walleij@linaro.org, 
	u.kleine-koenig@pengutronix.de, linux-gpio@vger.kernel.org, 
	linux-kernel@vger.kernel.org
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable

On Thu, Feb 29, 2024 at 6:24=E2=80=AFPM Arturas Moskvinas
<arturas.moskvinas@gmail.com> wrote:
>
>
>
> On 2/29/24 15:25, Bartosz Golaszewski wrote:
>
> On Thu, Feb 29, 2024 at 1:23=E2=80=AFPM Arturas Moskvinas
> <arturas.moskvinas@gmail.com> wrote:
>
> Chip outputs are enabled[1] before actual reset is performed[2] which mig=
ht
> cause pin output value to flip flop if previous pin value was set to 1
> in chip.
> Fix that behavior by making sure chip is fully reset before all outputs a=
re
> enabled.
>
> Bartosz, does this look better?
>
> ... if previous pin value was set to 1 period
>
> Andriy, Bartosz, is commit message ok?
> =3D=3D=3D
> gpio: 74x164: Enable output pins after registers are reset
>
> Chip outputs are enabled[1] before actual reset is performed[2] which mig=
ht
> cause pin output value to flip flop if previous pin value was set to 1.
> Fix that behavior by making sure chip is fully reset before all outputs a=
re
> enabled.
>
> Flip-flop can be noticed when module is removed and inserted again and on=
e of
> the pins was changed to 1 before removal. 100 microsecond flipping is
> noticeable on oscilloscope (100khz SPI bus).
>
> For a properly reset chip - output is enabled around 100 microseconds (on=
 100khz
> SPI bus) later during probing process hence should be irrelevant behavior=
al
> change.
>
> Fixes: 7ebc194d0fd4 (gpio: 74x164: Introduce 'enable-gpios' property)
> Link: https://elixir.bootlin.com/linux/v6.7.4/source/drivers/gpio/gpio-74=
x164.c#L130 [1]
> Link: https://elixir.bootlin.com/linux/v6.7.4/source/drivers/gpio/gpio-74=
x164.c#L150 [2]
> Signed-off-by: Arturas Moskvinas <arturas.moskvinas@gmail.com>
> =3D=3D=3D
>
> Arturas Moskvinas

Looks good to me.

Bart