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Message-ID: <294dc34c-11ac-4220-9619-1578ebca6382@amd.com>
Date: Thu, 29 Feb 2024 17:45:26 -0600
User-Agent: Mozilla Thunderbird Beta
Subject: Re: [PATCH v11 2/4] dt-bindings: remoteproc: add Tightly Coupled
 Memory (TCM) bindings
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
 andersson@kernel.org, mathieu.poirier@linaro.org, robh+dt@kernel.org,
 krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
 michal.simek@amd.com, ben.levinsky@amd.com
Cc: linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org,
 linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
 Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
References: <20240219174437.3722620-1-tanmay.shah@amd.com>
 <20240219174437.3722620-3-tanmay.shah@amd.com>
 <d0963aeb-1165-469b-b9c7-410a61b117f4@linaro.org>
Content-Language: en-US
From: Tanmay Shah <tanmay.shah@amd.com>
In-Reply-To: <d0963aeb-1165-469b-b9c7-410a61b117f4@linaro.org>
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 =?utf-8?B?cktYWlRHM2s3ZjFBd0VHeFg4UjZrMnNtbkRsVmhUNTRvKzNhc1FPQWkyeVFs?=
 =?utf-8?B?SDQyOGQwMDdEMFJ6NkdUY0RkYWg4SHpZazJzSEd5QzBZRFRoQjdKMC8wNzRp?=
 =?utf-8?B?OHJMWkFBMWlCVVU5Qmtmc2tOVCtnMnhSaU5NRzgxOUZYVU5yak1yalRYR2tZ?=
 =?utf-8?B?cHF6cVVPa080b1RUUUZBbExvV1Vwc1hYcWNMVmplS0JoNzV4eHF1dE5aWjYy?=
 =?utf-8?B?MHA3NkE0KzBWKzdpbmllVjg2dHBWbnd6REVCdEhpZnRLaFc1R21HeG9rb20r?=
 =?utf-8?B?bm1WWGRROEFCRWcxOXN6WHRvb0ZKc2tYNnNRakRCdVpodm5KTUUrdGZ6Zmht?=
 =?utf-8?B?QjZMOHVJYktuYWo4R3lTUEhDVkdyQm8yUWNwUkU2WTVadXFDczZmNUo3K0hz?=
 =?utf-8?B?SXl5SUtubU5Ya0dVRXpQWEZQZ3kxSlFhdWNaZTZFUndoeG4yUzlXTFJlRGpJ?=
 =?utf-8?B?aFRlckRla0J5SlBHK3oydUlQWkVvM3MvZkhQbkpOdnlFUHdmSjRBMXpVcGdK?=
 =?utf-8?B?eUk2YUVaSzJ0ZmluVXQ3ZUNMcjdIVTcrRUpYNzJrSTFEdHQvV2lJdGxKTnNK?=
 =?utf-8?B?REJubUdSY0tCMDMveVlhc3drSjhuemJUVVdWTE8wVklpbFBVY2hzSFhWOVA3?=
 =?utf-8?B?V1EzL0NtVjBlWERnMHgva2UrTHdyUFYySS9NNGZscUxhSHdrQlBlT0dxNmlS?=
 =?utf-8?B?RmhETDZaYXRSQnlVY3pUVTVFaG41Z3V0a2VBQXdXTVVpWGpIc1lTenRaaGJC?=
 =?utf-8?B?T2JqRUg4RVZuSENaODBpei95Q2VETy9iK0MrQkx3WTZMTUdSR2U3Wll5TmRL?=
 =?utf-8?B?OEpmTVZRenVoZzlUNElFZ1dvNVpoZTQvWVN0Y085VUIzQkdValE0R1VFTTZY?=
 =?utf-8?B?MHBZSjViVnlkbEJyeXNhcU1Yelc5S1RCbTE5L0g3MmN3eHBTNlBUWURuT3JE?=
 =?utf-8?B?OUpkN0hGUG0rWUMvbU01a0xiSnF5YUptUVJ6Ynphb2F4dzZlYmZwZzM4U09h?=
 =?utf-8?B?VWFMM1NWbCtTd0FhV1pZL1ZNckVDMjF1VzVUN0RrblBncGdkaHF5VXY4Sml5?=
 =?utf-8?B?YXNjQmdRbHBhcXh1alNLekNpbDBCWEpoN0NZc2J3U3NjSUxPSmg0eDBlRVZz?=
 =?utf-8?B?VjJxYnJJaE5JS3g4eFpvcGpiWUdMb0tReHVMUXFCTm1CUTgrM2RLVzJCR0NR?=
 =?utf-8?B?akRmZDdKWC8yWFhuVTVJZ05xaC9NdTBIcUxyNXN0Y3ZZdUVub0QyZ2g4cjZC?=
 =?utf-8?B?K0k1Rk9oWHVrQzR5dUYzbXpwenk0UkJMMW5TdXFlZHd2czljMVlBUGNjMTFu?=
 =?utf-8?B?VXMrSWZBalZCR0dlVVVQTzVOeW9qWGpyY2FzTTBUUWJQZDMrZzNTSmhiT3A1?=
 =?utf-8?B?L3J0NlFFUHBxR1R5aHZDM09LZzB2ak9obUk2QXl0V3RubWxkQ2Fza1h2c09O?=
 =?utf-8?B?YW4vRTRtV1ZYRkIvd1R1UmtxeTlrWVdHLzZxNE95dzRmbFkwZnFCdGpPRE1j?=
 =?utf-8?B?cGhpWXc4b0w5VVN0RXIzWEhxaW9UWTk3UjB0ZXdLQmtsRE5WUVBVa09jYlJO?=
 =?utf-8?B?NGhVVmIvMy84Rlo1OXdTNmk5YlFLM1g1bHlkandOa3I3OTNad3cwY29zRHVL?=
 =?utf-8?B?V0NaQVRiVW5pOE9BVUFvRmY4UGZ4Qmtta2Y2eGpmSWN0NGovRk0xWit5OFlK?=
 =?utf-8?B?VUhNYXh0UU9nRkxkMGRlVDd2RXdVUGErWTlxSldlRUo5Q0ZuU25YcCtIN3JJ?=
 =?utf-8?B?eThLc2NQVFlZOXBRZE5STXd0cWVnWEphU3hHVndSaVlKMXhMQ3Bpa2VqaHZ6?=
 =?utf-8?B?ZDNBdDF6TjltQkFRSEk0U21VVHA3V0UrOWg4amRMZE5qQ1l1UEVTa21BZE9h?=
 =?utf-8?B?OU1hM1V1UnBNNWx2dkpUdVlrRkpCaFR0QnlRYiswYndHWUhLUGs2ZGgxR2ND?=
 =?utf-8?B?TElyU3NROTJWRWRvcE1zOG0zWlpyYkZzcGlUY3FwWXIvNHZSV0g0R0xSYVJ1?=
 =?utf-8?Q?TjcYTcye6nREMIlAhJU35j8IE?=
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Thanks for reviews.

Ack to all comments, I will address in next revision.


Tanmay

On 2/29/24 3:59 AM, Krzysztof Kozlowski wrote:
> On 19/02/2024 18:44, Tanmay Shah wrote:
> > From: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
> > 
> > Introduce bindings for TCM memory address space on AMD-xilinx Zynq
> > UltraScale+ platform. It will help in defining TCM in device-tree
> > and make it's access platform agnostic and data-driven.
> > 
> > Tightly-coupled memories(TCMs) are low-latency memory that provides
> > predictable instruction execution and predictable data load/store
> > timing. Each Cortex-R5F processor contains two 64-bit wide 64 KB memory
> > banks on the ATCM and BTCM ports, for a total of 128 KB of memory.
> > 
> > The TCM resources(reg, reg-names and power-domain) are documented for
> > each TCM in the R5 node. The reg and reg-names are made as required
> > properties as we don't want to hardcode TCM addresses for future
> > platforms and for zu+ legacy implementation will ensure that the
> > old dts w/o reg/reg-names works and stable ABI is maintained.
> > 
> > It also extends the examples for TCM split and lockstep modes.
> > 
> > Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
> > Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
> > ---
> > 
> > Changes in v11:
> >   - Fix yamllint warning and reduce indentation as needed
> > 
> >  .../remoteproc/xlnx,zynqmp-r5fss.yaml         | 192 ++++++++++++++++--
> >  1 file changed, 170 insertions(+), 22 deletions(-)
> > 
> > diff --git a/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml b/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml
> > index 78aac69f1060..77030edf41fa 100644
> > --- a/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml
> > +++ b/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml
> > @@ -20,9 +20,21 @@ properties:
> >    compatible:
> >      const: xlnx,zynqmp-r5fss
> >  
> > +  "#address-cells":
> > +    const: 2
> > +
> > +  "#size-cells":
> > +    const: 2
> > +
> > +  ranges:
> > +    description: |
> > +      Standard ranges definition providing address translations for
> > +      local R5F TCM address spaces to bus addresses.
> > +
> >    xlnx,cluster-mode:
> >      $ref: /schemas/types.yaml#/definitions/uint32
> >      enum: [0, 1, 2]
> > +    default: 1
> >      description: |
> >        The RPU MPCore can operate in split mode (Dual-processor performance), Safety
> >        lock-step mode(Both RPU cores execute the same code in lock-step,
> > @@ -37,7 +49,7 @@ properties:
> >        2: single cpu mode
> >  
> >  patternProperties:
> > -  "^r5f-[a-f0-9]+$":
> > +  "^r5f@[0-9a-f]+$":
> >      type: object
> >      description: |
> >        The RPU is located in the Low Power Domain of the Processor Subsystem.
> > @@ -54,9 +66,6 @@ patternProperties:
> >        compatible:
> >          const: xlnx,zynqmp-r5f
> >  
> > -      power-domains:
> > -        maxItems: 1
>
> Why power-domains are being dropped? This should have widest constraints
> if you later customize it.
>
> > -
> >        mboxes:
> >          minItems: 1
> >          items:
> > @@ -101,35 +110,174 @@ patternProperties:
> >  
> >      required:
> >        - compatible
> > -      - power-domains
>
> Don't drop power domains.
>
>
> >  
> > -    unevaluatedProperties: false
> > +allOf:
>
> allOf block goes after required:
>
> > +  - if:
> > +      properties:
> > +        xlnx,cluster-mode:
> > +          enum:
> > +            - 1
> > +    then:
> > +      patternProperties:
> > +        "^r5f@[0-9a-f]+$":
> > +          type: object
> > +
> > +          properties:
> > +            reg:
>
> reg is missing in your patternProperties earlier.
>
>
>
> Best regards,
> Krzysztof
>