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 <b1ec1953-2df8-4987-a7d0-4758835b5392@linux.intel.com>
In-Reply-To: <b1ec1953-2df8-4987-a7d0-4758835b5392@linux.intel.com>
From: Ian Rogers <irogers@google.com>
Date: Thu, 29 Feb 2024 16:48:17 -0800
Message-ID: <CAP-5=fWHQthKat7SZx6P8CeMpjfsgYgp8=+nxvHBMmMVZF9_vw@mail.gmail.com>
Subject: Re: [PATCH v1 13/20] perf jevents: Add cycles breakdown metric for Intel
To: "Liang, Kan" <kan.liang@linux.intel.com>
Cc: Perry Taylor <perry.taylor@intel.com>, Samantha Alt <samantha.alt@intel.com>, 
	Caleb Biggers <caleb.biggers@intel.com>, Weilin Wang <weilin.wang@intel.com>, 
	Edward Baker <edward.baker@intel.com>, Andi Kleen <ak@linux.intel.com>, 
	Peter Zijlstra <peterz@infradead.org>, Ingo Molnar <mingo@redhat.com>, 
	Arnaldo Carvalho de Melo <acme@kernel.org>, Namhyung Kim <namhyung@kernel.org>, 
	Mark Rutland <mark.rutland@arm.com>, 
	Alexander Shishkin <alexander.shishkin@linux.intel.com>, Jiri Olsa <jolsa@kernel.org>, 
	Adrian Hunter <adrian.hunter@intel.com>, John Garry <john.g.garry@oracle.com>, 
	Jing Zhang <renyu.zj@linux.alibaba.com>, Thomas Richter <tmricht@linux.ibm.com>, 
	James Clark <james.clark@arm.com>, linux-kernel@vger.kernel.org, 
	linux-perf-users@vger.kernel.org, Stephane Eranian <eranian@google.com>
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On Thu, Feb 29, 2024 at 1:30=E2=80=AFPM Liang, Kan <kan.liang@linux.intel.c=
om> wrote:
>
>
>
> On 2024-02-28 7:17 p.m., Ian Rogers wrote:
> > Breakdown cycles to user, kernel and guest.
> >
> > Signed-off-by: Ian Rogers <irogers@google.com>
> > ---
> >  tools/perf/pmu-events/intel_metrics.py | 18 ++++++++++++++++++
> >  1 file changed, 18 insertions(+)
> >
> > diff --git a/tools/perf/pmu-events/intel_metrics.py b/tools/perf/pmu-ev=
ents/intel_metrics.py
> > index dae44d296861..fef40969a4b8 100755
> > --- a/tools/perf/pmu-events/intel_metrics.py
> > +++ b/tools/perf/pmu-events/intel_metrics.py
> > @@ -26,6 +26,23 @@ core_cycles =3D Event("CPU_CLK_UNHALTED.THREAD_P_ANY=
",
> >  smt_cycles =3D Select(core_cycles / 2, Literal("#smt_on"), core_cycles=
)
> >
> >
> > +def Cycles() -> MetricGroup:
> > +  cyc_k =3D Event("cycles:kHh")
> > +  cyc_g =3D Event("cycles:G")
> > +  cyc_u =3D Event("cycles:uH")
> > +  cyc =3D cyc_k + cyc_g + cyc_u
> > +
> > +  return MetricGroup("cycles", [
> > +      Metric("cycles_total", "Total number of cycles", cyc, "cycles"),
> > +      Metric("cycles_user", "User cycles as a percentage of all cycles=
",
> > +             d_ratio(cyc_u, cyc), "100%"),
> > +      Metric("cycles_kernel", "Kernel cycles as a percentage of all cy=
cles",
> > +             d_ratio(cyc_k, cyc), "100%"),
> > +      Metric("cycles_guest", "Hypervisor guest cycles as a percentage =
of all cycles",
> > +             d_ratio(cyc_g, cyc), "100%"),
> > +  ], description =3D "cycles breakdown per privilege level (users, ker=
nel, guest)")
> > +
> > +
> >  def Idle() -> Metric:
> >    cyc =3D Event("msr/mperf/")
> >    tsc =3D Event("msr/tsc/")
> > @@ -770,6 +787,7 @@ def IntelLdSt() -> Optional[MetricGroup]:
> >
> >
> >  all_metrics =3D MetricGroup("", [
> > +    Cycles(),
>
> The metric group seem exactly the same on AMD and ARM. Maybe we can have
> tools/perf/pmu-events/common_metrics.py for all the common metrics.

Agreed. I think we can drop cycles in the three sets and then once
then do the common_metrics.py as a follow up.

Thanks,
Ian

> Thanks,
> Kan
>
> >      Idle(),
> >      Rapl(),
> >      Smi(),