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AJvYcCVgUmjfhFLuaDDkfxONanCa9c4btV9i+YJ6GzDkJxDo3gxBVbbfkAGahxL3pnyU88A2ArhHrii40V2D4Wh3x61dbp9gDQ5EFOGmglbjbW9aZeyS9wlQ9GtFbuXgXeTnHSF0/E1RaEIwlQ== X-Gm-Message-State: AOJu0YyW5C5S9f2/fxfgHg1z9GmhAah9BZkqskUKkXqDAu9BcwfhGVNZ XK56bdO8RzOuLvYKX1DnunZt6J8hhs1Pzf/MNSAyKqfATkDpdmA0FY9C1LTf44VUmwh3inJ+Pbh MCpTRCHsWf3B0HaILFu+UcW0l7UI= X-Received: by 2002:a17:906:2789:b0:a3f:bcff:18b8 with SMTP id j9-20020a170906278900b00a3fbcff18b8mr528927ejc.27.1709270415376; Thu, 29 Feb 2024 21:20:15 -0800 (PST) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240229-rk-dts-additions-v3-0-6afe8473a631@gmail.com> <20240229-rk-dts-additions-v3-1-6afe8473a631@gmail.com> <5eb9193a44fb9f9b1e976412874cecef@manjaro.org> In-Reply-To: <5eb9193a44fb9f9b1e976412874cecef@manjaro.org> From: Alexey Charkov Date: Fri, 1 Mar 2024 09:20:04 +0400 Message-ID: Subject: Re: [PATCH v3 1/5] arm64: dts: rockchip: enable built-in thermal monitoring on RK3588 To: Dragan Simic Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Daniel Lezcano , Viresh Kumar , Chen-Yu Tsai , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, Mar 1, 2024 at 1:11=E2=80=AFAM Dragan Simic wr= ote: > > Hello Alexey, > > Please see also some nitpicks below, which I forgot to mention in > my earlier response. I'm sorry for that. > > On 2024-02-29 20:26, Alexey Charkov wrote: > > Include thermal zones information in device tree for RK3588 variants. > > > > This also enables the TSADC controller unconditionally on all boards > > to ensure that thermal protections are in place via throttling and > > emergency reset, once OPPs are added to enable CPU DVFS. > > > > The default settings (using CRU as the emergency reset mechanism) > > should work on all boards regardless of their wiring, as CRU resets > > do not depend on any external components. Boards that have the TSHUT > > signal wired to the reset line of the PMIC may opt to switch to GPIO > > tshut mode instead (rockchip,hw-tshut-mode =3D <1>;) > > > > It seems though that downstream kernels don't use that, even for > > those boards where the wiring allows for GPIO based tshut, such as > > Radxa Rock 5B [1], [2], [3] > > > > [1] > > https://github.com/radxa/kernel/blob/stable-5.10-rock5/arch/arm64/boot/= dts/rockchip/rk3588-rock-5b.dts#L540 > > [2] > > https://github.com/radxa/kernel/blob/stable-5.10-rock5/arch/arm64/boot/= dts/rockchip/rk3588s.dtsi#L5433 > > [3] https://dl.radxa.com/rock5/5b/docs/hw/radxa_rock_5b_v1423_sch.pdf > > page 11 (TSADC_SHUT_H) > > > > Signed-off-by: Alexey Charkov > > --- > > arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 176 > > +++++++++++++++++++++++++++++- > > 1 file changed, 175 insertions(+), 1 deletion(-) > > > > diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > > b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > > index 36b1b7acfe6a..9bf197358642 100644 > > --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > > +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > > @@ -10,6 +10,7 @@ > > #include > > #include > > #include > > +#include > > > > / { > > compatible =3D "rockchip,rk3588"; > > @@ -2225,7 +2226,180 @@ tsadc: tsadc@fec00000 { > > pinctrl-1 =3D <&tsadc_shut>; > > pinctrl-names =3D "gpio", "otpout"; > > #thermal-sensor-cells =3D <1>; > > - status =3D "disabled"; > > + status =3D "okay"; > > + }; > > + > > + thermal_zones: thermal-zones { > > + /* sensor near the center of the SoC */ > > + package_thermal: package-thermal { > > + polling-delay-passive =3D <0>; > > + polling-delay =3D <0>; > > + thermal-sensors =3D <&tsadc 0>; > > + > > + trips { > > + package_crit: package-crit { > > + temperature =3D <115000>; > > + hysteresis =3D <0>; > > + type =3D "critical"; > > + }; > > + }; > > + }; > > + > > + /* sensor between A76 cores 0 and 1 */ > > + bigcore0_thermal: bigcore0-thermal { > > + polling-delay-passive =3D <100>; > > + polling-delay =3D <0>; > > + thermal-sensors =3D <&tsadc 1>; > > + > > + trips { > > + /* threshold to start collecting temperat= ure > > + * statistics e.g. with the IPA governor > > + */ > > See, I'm not a native English speaker, but I've spent a lot of time > and effort improving my English skills. Thus, perhaps these comments > may or may not seem like unnecessary nitpicking, depending on how much > someone pays attention to writing style in general, but I'll risk to > be annoying and state these comments anyway. :) > > The comment above could be written in a much more condensed form like > this, which would also be a bit more accurate: > > > /* IPA threshold, when IPA governor is us= ed */ > > IOW, we're writing all this for someone to read later, but we should > (and can) perfectly reasonably expect some already existing background > knowledge from the readers. In other words, we should be as concise > as possible. In fact, the power allocation governor code itself doesn't call those trips threshold or target as your suggested wording would imply. Instead, it calls them "switch on temperature" and "maximum desired temperature" [1]. Maybe we can call them that in the comments (and also avoid calling the governor IPA, because upstream code only calls it a "power allocator"). Best regards, Alexey [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree= /drivers/thermal/gov_power_allocator.c#n483 > > + bigcore0_alert0: bigcore0-alert0 { > > + temperature =3D <75000>; > > + hysteresis =3D <2000>; > > + type =3D "passive"; > > + }; > > + /* actual control temperature */ > > Similarly to the above, I'd suggest this: > > /* IPA target, when IPA governor is used = */ > > Having such brief comments should make it all perfectly understandable > to anyone who's already familiar with the way IPA governor works. > Everyone > else should be welcome to read up a bit on IPA first. > > > + bigcore0_alert1: bigcore0-alert1 { > > + temperature =3D <85000>; > > + hysteresis =3D <2000>; > > + type =3D "passive"; > > + }; > > + bigcore0_crit: bigcore0-crit { > > + temperature =3D <115000>; > > + hysteresis =3D <0>; > > + type =3D "critical"; > > + }; > > + }; > > + cooling-maps { > > + map0 { > > + trip =3D <&bigcore0_alert1>; > > + cooling-device =3D > > + <&cpu_b0 THERMAL_NO_LIMIT= THERMAL_NO_LIMIT>, > > + <&cpu_b1 THERMAL_NO_LIMIT= THERMAL_NO_LIMIT>; > > + }; > > + }; > > + }; > > + > > + /* sensor between A76 cores 2 and 3 */ > > + bigcore2_thermal: bigcore2-thermal { > > + polling-delay-passive =3D <100>; > > + polling-delay =3D <0>; > > + thermal-sensors =3D <&tsadc 2>; > > + > > + trips { > > + /* threshold to start collecting temperat= ure > > + * statistics e.g. with the IPA governor > > + */ > > The same as above. > > > + bigcore2_alert0: bigcore2-alert0 { > > + temperature =3D <75000>; > > + hysteresis =3D <2000>; > > + type =3D "passive"; > > + }; > > + /* actual control temperature */ > > The same as above. > > > + bigcore2_alert1: bigcore2-alert1 { > > + temperature =3D <85000>; > > + hysteresis =3D <2000>; > > + type =3D "passive"; > > + }; > > + bigcore2_crit: bigcore2-crit { > > + temperature =3D <115000>; > > + hysteresis =3D <0>; > > + type =3D "critical"; > > + }; > > + }; > > + cooling-maps { > > + map0 { > > + trip =3D <&bigcore2_alert1>; > > + cooling-device =3D > > + <&cpu_b2 THERMAL_NO_LIMIT= THERMAL_NO_LIMIT>, > > + <&cpu_b3 THERMAL_NO_LIMIT= THERMAL_NO_LIMIT>; > > + }; > > + }; > > + }; > > + > > + /* sensor between the four A55 cores */ > > + little_core_thermal: littlecore-thermal { > > + polling-delay-passive =3D <100>; > > + polling-delay =3D <0>; > > + thermal-sensors =3D <&tsadc 3>; > > + > > + trips { > > + /* threshold to start collecting temperat= ure > > + * statistics e.g. with the IPA governor > > + */ > > The same as above. > > > + littlecore_alert0: littlecore-alert0 { > > + temperature =3D <75000>; > > + hysteresis =3D <2000>; > > + type =3D "passive"; > > + }; > > + /* actual control temperature */ > > The same as above. > > > + littlecore_alert1: littlecore-alert1 { > > + temperature =3D <85000>; > > + hysteresis =3D <2000>; > > + type =3D "passive"; > > + }; > > + littlecore_crit: littlecore-crit { > > + temperature =3D <115000>; > > + hysteresis =3D <0>; > > + type =3D "critical"; > > + }; > > + }; > > + cooling-maps { > > + map0 { > > + trip =3D <&littlecore_alert1>; > > + cooling-device =3D > > + <&cpu_l0 THERMAL_NO_LIMIT= THERMAL_NO_LIMIT>, > > + <&cpu_l1 THERMAL_NO_LIMIT= THERMAL_NO_LIMIT>, > > + <&cpu_l2 THERMAL_NO_LIMIT= THERMAL_NO_LIMIT>, > > + <&cpu_l3 THERMAL_NO_LIMIT= THERMAL_NO_LIMIT>; > > + }; > > + }; > > + }; > > + > > + /* sensor near the PD_CENTER power domain */ > > + center_thermal: center-thermal { > > + polling-delay-passive =3D <0>; > > + polling-delay =3D <0>; > > + thermal-sensors =3D <&tsadc 4>; > > + > > + trips { > > + center_crit: center-crit { > > + temperature =3D <115000>; > > + hysteresis =3D <0>; > > + type =3D "critical"; > > + }; > > + }; > > + }; > > + > > + gpu_thermal: gpu-thermal { > > + polling-delay-passive =3D <0>; > > + polling-delay =3D <0>; > > + thermal-sensors =3D <&tsadc 5>; > > + > > + trips { > > + gpu_crit: gpu-crit { > > + temperature =3D <115000>; > > + hysteresis =3D <0>; > > + type =3D "critical"; > > + }; > > + }; > > + }; > > + > > + npu_thermal: npu-thermal { > > + polling-delay-passive =3D <0>; > > + polling-delay =3D <0>; > > + thermal-sensors =3D <&tsadc 6>; > > + > > + trips { > > + npu_crit: npu-crit { > > + temperature =3D <115000>; > > + hysteresis =3D <0>; > > + type =3D "critical"; > > + }; > > + }; > > + }; > > }; > > > > saradc: adc@fec10000 {