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Date: Fri, 1 Mar 2024 13:46:15 +0100
From: Johan Hovold <johan@kernel.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Bjorn Helgaas <helgaas@kernel.org>,
	Johan Hovold <johan+linaro@kernel.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konrad.dybcio@linaro.org>,
	Lorenzo Pieralisi <lpieralisi@kernel.org>,
	Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= <kw@linux.com>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>, linux-arm-msm@vger.kernel.org,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 00/12] arm64: dts: qcom: sc8280xp: PCIe fixes and
 GICv3 ITS enable
Message-ID: <ZeHOF4p1LlNDiLcy@hovoldconsulting.com>
References: <20240223152124.20042-1-johan+linaro@kernel.org>
 <20240228220843.GA309344@bhelgaas>
 <20240229100853.GA2999@thinkpad>
 <ZeBbrJhks46XByMD@hovoldconsulting.com>
 <20240229122416.GD2999@thinkpad>
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 <20240301122406.GA2401@thinkpad>
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On Fri, Mar 01, 2024 at 05:54:06PM +0530, Manivannan Sadhasivam wrote:
> On Thu, Feb 29, 2024 at 04:37:27PM +0100, Johan Hovold wrote:

> > I'm all for digging further into this issue with the help of Qualcomm,
> > but I don't think that should block this series as that would leave the
> > link errors that we hit since 6.7 in place and effectively prevent us
> > from enabling the ITS in 6.9.
> 
> Sounds fair. I will report back, perhaps with a fix based on what I get to know.

Sounds good, thanks.

> But I think it is better to disable L0s in the SoC dtsi itself. That's not only
> because there are patches to essentially disable L0s in 2 of the available
> platforms making use of this Soc, but also you are enabling GIC ITS in the SoC
> dtsi and that may affect sa8540p which is making use of this dtsi.

I did not do so on purpose as I'm only disabling L0s on machines where
I've confirmed the issue. And the assumption for now is that this is a
machine-level issue.

> The users of that SoC may have not noticed the errors as you did before, but
> enabling GIC ITS will certainly make the issue visible to them (more likely).

Sure and that would be good to know as that would give us another data
point which may help determine where the problem lies. Enabling the ITS
will (hopefully) be done in 6.9 so we'll have a whole cycle to disable
L0s where needed. I don't think this should be done before then.

Johan