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From: "Tian, Kevin" <kevin.tian@intel.com>
To: Lu Baolu <baolu.lu@linux.intel.com>, Joerg Roedel <joro@8bytes.org>, "Will
 Deacon" <will@kernel.org>, Robin Murphy <robin.murphy@arm.com>, "Jason
 Gunthorpe" <jgg@ziepe.ca>, "Badger, Eric" <ebadger@purestorage.com>
CC: "iommu@lists.linux.dev" <iommu@lists.linux.dev>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH 1/3] iommu/vt-d: Setup scalable mode context entry in
 probe path
Thread-Topic: [PATCH 1/3] iommu/vt-d: Setup scalable mode context entry in
 probe path
Thread-Index: AQHaavVCLTBatnZFXkG2swhnu2ybRrEnN6mA
Date: Mon, 4 Mar 2024 07:48:27 +0000
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References: <20240229094804.121610-1-baolu.lu@linux.intel.com>
 <20240229094804.121610-2-baolu.lu@linux.intel.com>
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> From: Lu Baolu <baolu.lu@linux.intel.com>
> Sent: Thursday, February 29, 2024 5:48 PM
>=20
> +static int device_pasid_table_setup(struct device *dev, u8 bus, u8 devfn=
)
> +{
> +	struct device_domain_info *info =3D dev_iommu_priv_get(dev);
> +	struct intel_iommu *iommu =3D info->iommu;
> +	struct context_entry *context;
> +
> +	spin_lock(&iommu->lock);
> +	context =3D iommu_context_addr(iommu, bus, devfn, true);
> +	if (!context) {
> +		spin_unlock(&iommu->lock);
> +		return -ENOMEM;
> +	}
> +
> +	if (context_present(context) && !context_copied(iommu, bus, devfn))
> {
> +		spin_unlock(&iommu->lock);
> +		return 0;
> +	}
> +
> +	/*
> +	 * For kdump case, at this point, the device is supposed to finish
> +	 * reset at its driver probe stage, so no in-flight DMA will exist,
> +	 * and we don't need to worry anymore hereafter.
> +	 */
> +	if (context_copied(iommu, bus, devfn)) {
> +		context_clear_entry(context);
> +		if (!ecap_coherent(iommu->ecap))
> +			clflush_cache_range(context, sizeof(*context));
> +		sm_context_flush_caches(dev);
> +		clear_context_copied(iommu, bus, devfn);
> +	}

it's unclear to me why this doesn't need refer to old did as done in the
existing code. If scalable mode makes any difference could you extend
the comment to explain so people can avoid similar confusion when
comparing the different paths between legacy and sm?

anyway it's kind of a semantics change probably worth a separate patch
to special case sm for bisect and then doing cleanup...