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AJvYcCVAbVLkKGuIbxCu0JiDq+4ik8qaz4YAZjw1ksNeYPoDKMayftfoSjbBu12uE7ovgGzqY4jq8lmc1PKqhKGqamgYZadfA8OkRURcCW8qGKVtOzZxn29Rq8hZ0KhmMjuBY6pkUl+cniMvrQ== X-Gm-Message-State: AOJu0YwJwRVNBUtyMvUsqOq0QBKTyT29OBn3q0kTcX5kv/af3/cgp+ih IrD3dIv6kBnxVRNrave38O4LAJci/4BdT3vB7wrW+jhj8cbGtH9t X-Received: by 2002:a17:902:ab96:b0:1dc:abeb:22fe with SMTP id f22-20020a170902ab9600b001dcabeb22femr8317535plr.65.1709542777408; Mon, 04 Mar 2024 00:59:37 -0800 (PST) Received: from localhost ([46.3.240.108]) by smtp.gmail.com with ESMTPSA id s13-20020a170902ea0d00b001dcc0c84721sm7982371plg.99.2024.03.04.00.59.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 04 Mar 2024 00:59:37 -0800 (PST) From: Jingbao Qiu To: u.kleine-koenig@pengutronix.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu Cc: linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, dlan@gentoo.org, inochiama@outlook.com, Jingbao Qiu Subject: [PATCH v4 0/2] riscv: pwm: sophgo: add pwm support for CV1800 Date: Mon, 4 Mar 2024 16:59:31 +0800 Message-Id: <20240304085933.1246964-1-qiujingbao.dlmu@gmail.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The Sophgo CV1800 chip provides a set of four independent PWM channel outputs. This series adds PWM controller support for Sophgo cv1800. Changes since v3: - use macro instead of npwm number - add support for polarity feature - add Output-Enable/OE check v3: https://lore.kernel.org/all/20240223082014.109385-1-qiujingbao.dlmu@gmail.com/ Changes since v2: - use 0x08 instead of macro - split if statements based on conditions - in order to round up, first calculate the number of high-level cycles, then subtract it from the PERIOD to obtain the number of HLPERIOD - use new pwmchip_alloc() API instead of old style v2: https://lore.kernel.org/all/20240212121729.1086718-1-qiujingbao.dlmu@gmail.com/ Changes since v1: - drop full stop from subject - re-order maintainers and description - pass checkpatch.pl --strict - fix naming errors - add "Limitations" section - use a driver specific prefix for all defines - using bool instead u32 in cv1800_pwm_enable - check and set state->polarity - use mul_u64_u64_div_u64 - use clk_rate_exclusive_get(), balance with clk_rate_exclusive_put() - using macro definitions instead of shift operations - remove shift operation on 0 - use priv replace cv_pwm - hardcode npwm - set atomic to true - remove MODULE_ALIAS v1: https://lore.kernel.org/all/20240207055856.672184-1-qiujingbao.dlmu@gmail.com/ Jingbao Qiu (2): dt-bindings: pwm: sophgo: add pwm for Sophgo CV1800 series SoC pwm: sophgo: add pwm support for Sophgo CV1800 SoC .../bindings/pwm/sophgo,cv1800-pwm.yaml | 45 +++ drivers/pwm/Kconfig | 10 + drivers/pwm/Makefile | 1 + drivers/pwm/pwm-cv1800.c | 314 ++++++++++++++++++ 4 files changed, 370 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/sophgo,cv1800-pwm.yaml create mode 100644 drivers/pwm/pwm-cv1800.c base-commit: 801de0882d8a95aa1b1fe67df1696e037d785656 -- 2.25.1