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From: Alexander Stein <alexander.stein@ew.tq-group.com>
To: Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Shawn Guo <shawnguo@kernel.org>, Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix Kernel Team <kernel@pengutronix.de>, Fabio Estevam <festevam@gmail.com>, linux-arm-kernel@lists.infradead.org
Cc: devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Frank Li <Frank.Li@nxp.com>, Alice Guo <alice.guo@nxp.com>, Peng Fan <peng.fan@nxp.com>, Frank Li <Frank.Li@nxp.com>
Subject: Re: [PATCH v2 2/4] arm64: dts: imx8dxl: add lpuart device in cm40 subsystem
Date: Mon, 04 Mar 2024 10:12:04 +0100
Message-ID: <6024754.lOV4Wx5bFT@steina-w>
Organization: TQ-Systems GmbH
In-Reply-To: <20240302-m4_lpuart-v2-2-89a5952043b6@nxp.com>
References: <20240302-m4_lpuart-v2-0-89a5952043b6@nxp.com> <20240302-m4_lpuart-v2-2-89a5952043b6@nxp.com>
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Hi Frank,

thanks for the update.

Am Samstag, 2. M=E4rz 2024, 17:27:45 CET schrieb Frank Li:
> From: Alice Guo <alice.guo@nxp.com>
>=20
> Add lpuart device in cm40 subsystem.
>=20
> Signed-off-by: Alice Guo <alice.guo@nxp.com>
> Reviewed-by: Peng Fan <peng.fan@nxp.com>
> Signed-off-by: Frank Li <Frank.Li@nxp.com>

Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com>

> ---
>  arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi | 24 +++++++++++++++++++=
+++++
>  1 file changed, 24 insertions(+)
>=20
> diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi b/arch/arm64=
/boot/dts/freescale/imx8-ss-cm40.dtsi
> index 68043ab74e765..b6af85b20ddd7 100644
> --- a/arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi
> @@ -20,6 +20,18 @@ cm40_subsys: bus@34000000 {
>  	#size-cells =3D <1>;
>  	ranges =3D <0x34000000 0x0 0x34000000 0x4000000>;
> =20
> +	cm40_lpuart: serial@37220000 {
> +		compatible =3D "fsl,imx8qxp-lpuart";
> +		reg =3D <0x37220000 0x1000>;
> +		interrupts =3D <7 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks =3D <&cm40_uart_lpcg 1>, <&cm40_uart_lpcg 0>;
> +		clock-names =3D "ipg", "baud";
> +		assigned-clocks =3D <&clk IMX_SC_R_M4_0_UART IMX_SC_PM_CLK_PER>;
> +		assigned-clock-rates =3D <24000000>;
> +		power-domains =3D <&pd IMX_SC_R_M4_0_UART>;
> +		status =3D "disabled";
> +	};
> +
>  	cm40_i2c: i2c@37230000 {
>  		compatible =3D "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";
>  		reg =3D <0x37230000 0x1000>;
> @@ -53,6 +65,18 @@ cm40_intmux: intmux@37400000 {
>  		status =3D "disabled";
>  	};
> =20
> +	cm40_uart_lpcg: clock-controller@37620000 {
> +		compatible =3D "fsl,imx8qxp-lpcg";
> +		reg =3D <0x37620000 0x1000>;
> +		#clock-cells =3D <1>;
> +		clocks =3D <&clk IMX_SC_R_M4_0_UART IMX_SC_PM_CLK_PER>,
> +			 <&cm40_ipg_clk>;
> +		clock-indices =3D <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_1>;
> +		clock-output-names =3D "cm40_lpcg_uart_clk",
> +				     "cm40_lpcg_uart_ipg_clk";
> +		power-domains =3D <&pd IMX_SC_R_M4_0_UART>;
> +	};
> +
>  	cm40_i2c_lpcg: clock-controller@37630000 {
>  		compatible =3D "fsl,imx8qxp-lpcg";
>  		reg =3D <0x37630000 0x1000>;
>=20
>=20


=2D-=20
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