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Date: Mon, 04 Mar 2024 14:39:59 +0100
From: "Arnd Bergmann" <arnd@arndb.de>
To: "Christophe Leroy" <christophe.leroy@csgroup.eu>,
 "Guenter Roeck" <linux@roeck-us.net>, "Russell King" <linux@armlinux.org.uk>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
 "Palmer Dabbelt" <palmer@dabbelt.com>,
 "David Laight" <David.Laight@aculab.com>,
 "Charlie Jenkins" <charlie@rivosinc.com>,
 "James E . J . Bottomley" <James.Bottomley@hansenpartnership.com>,
 "Helge Deller" <deller@gmx.de>, "Palmer Dabbelt" <palmer@rivosinc.com>,
 "Geert Uytterhoeven" <geert@linux-m68k.org>,
 "Andrew Morton" <akpm@linux-foundation.org>,
 "Parisc List" <linux-parisc@vger.kernel.org>,
 "Linux ARM" <linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v11] lib: checksum: Use aligned accesses for ip_fast_csum and
 csum_ipv6_magic tests
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On Mon, Mar 4, 2024, at 12:39, Christophe Leroy wrote:
> Le 03/03/2024 =C3=A0 16:26, Guenter Roeck a =C3=A9crit=C2=A0:
>> On 3/3/24 02:20, Christophe Leroy wrote:
>
> I don't know much about ARM instruction set, seems like the ldr=20
> instruction used in ip_fast_csum() doesn't mind unaligned accesses whi=
le=20
> ldmia instruction used in csum_ipv6_magic() minds. Or is it a wrong=20
> behaviour of QEMU ?

Correct.

On ARMv6 and newer, accessing normal unaligned memory with ldr/str
does not trap, and that covers most unaligned accesses.

Some of the cases that don't allow unaligned access include:

- ARMv4/ARMv5 cannot access unaligned memory with the same
  instructions. Apparently the same is true for ARMv7-M.

- multi-word accesses (ldrd/strd and ldm/stm) require 32-bit
  alignment. These are generated for most 64-bit variables
  and some arrays

- unaligned access on MMIO registers (__iomem pointers)
  always trap

- atomic access (ldrex/strex) requires aligned data

- The C standard disallows casting to a type with larger
  alignment requirements, and gcc is known to produce
  code that doesn't work with this (and other) undefined
  behavior.

> If I change the test as follows to only use word aligned IPv6 addresse=
s,=20
> it works:
>
> diff --git a/lib/checksum_kunit.c b/lib/checksum_kunit.c
> index 225bb7701460..4d86fc8ccd78 100644
> --- a/lib/checksum_kunit.c
> +++ b/lib/checksum_kunit.c
> @@ -607,7 +607,7 @@ static void test_csum_ipv6_magic(struct kunit *tes=
t)
>   	const int csum_offset =3D sizeof(struct in6_addr) + sizeof(struct=20
> in6_addr) +
>   			    sizeof(int) + sizeof(char);
>
> -	for (int i =3D 0; i < NUM_IPv6_TESTS; i++) {
> +	for (int i =3D 0; i < NUM_IPv6_TESTS; i +=3D 4) {
>   		saddr =3D (const struct in6_addr *)(random_buf + i);
>   		daddr =3D (const struct in6_addr *)(random_buf + i +
>   						  daddr_offset);
>
>
> If I change csum_ipv6_magic() as follows to use instruction ldr instea=
d=20
> of ldmia, it also works without any change to the test:
>
> diff --git a/arch/arm/lib/csumipv6.S b/arch/arm/lib/csumipv6.S
> index 3559d515144c..a312d0836b95 100644
> --- a/arch/arm/lib/csumipv6.S
> +++ b/arch/arm/lib/csumipv6.S
> @@ -12,12 +12,18 @@
>   ENTRY(__csum_ipv6_magic)
>   		str	lr, [sp, #-4]!
>   		adds	ip, r2, r3
> -		ldmia	r1, {r1 - r3, lr}
> +		ldr	r2, [r1], #4
> +		ldr	r3, [r1], #4
> +		ldr	lr, [r1], #4
> +		ldr	r1, [r1]
>
> So now we are back to the initial question, should checksumming on=20
> unaligned addresses be supported or not ?
>
> Russell I understand from previous answers from you that half-word=20
> alignment should be supported, in that case should ARM version of=20
> csum_ipv6_magic() be modified ? In that case can you propose the most=20
> optimised fix ?

The csumipv6.S code predates ARMv6 and is indeed suboptimal on v6/v7
processors with unaligned ipv6 headers. Your workaround looks like
it should be much better, but it would at the same time make the
ARMv5 case much more expensive because it traps four times instead
of just one.

> If not, then the test has to be fixed to only use word-aligned IPv6=20
> addresses.

Because of the gcc issue I mentioned, net/ipv6/ip6_checksum.c
and anything else that accesses misaligned ipv6 headers may need
to be changed as well. Marking in6_addr as '__packed __aligned(2)'
should be sufficient for that. This will prevent gcc from issuing
ldm or ldrd on ARMv6+ as well as making optimization based on
the two lower bits of the address being zero on x86 and others.
The downside is that it forces 16-bit loads and stores to be
used on architectures that don't have efficient unaligned
access (armv5, alpha, mips, sparc and xtensa among others)
even when the IP headers are fully aligned.

     Arnd