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Message-ID: <7aedbb9f48b50b0f823ef7d622161905e41e76ec.camel@redhat.com>
Subject: Re: [PATCH 2/2] drm/nouveau: move more missing UAPI bits
From: Lyude Paul <lyude@redhat.com>
To: Karol Herbst <kherbst@redhat.com>, linux-kernel@vger.kernel.org
Cc: Danilo Krummrich <dakr@redhat.com>, dri-devel@lists.freedesktop.org, 
	nouveau@lists.freedesktop.org
Date: Mon, 04 Mar 2024 14:31:03 -0500
In-Reply-To: <20240304183157.1587152-2-kherbst@redhat.com>
References: <20240304183157.1587152-1-kherbst@redhat.com>
	 <20240304183157.1587152-2-kherbst@redhat.com>
Organization: Red Hat Inc.
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Reviewed-by: Lyude Paul <lyude@redhat.com>

On Mon, 2024-03-04 at 19:31 +0100, Karol Herbst wrote:
> Those are already de-facto UAPI, so let's just move it into the uapi
> header.
>=20
> Signed-off-by: Karol Herbst <kherbst@redhat.com>
> ---
>  drivers/gpu/drm/nouveau/nouveau_abi16.c | 20 +++++++++++++++-----
>  drivers/gpu/drm/nouveau/nouveau_abi16.h | 12 ------------
>  include/uapi/drm/nouveau_drm.h          | 22 ++++++++++++++++++++++
>  3 files changed, 37 insertions(+), 17 deletions(-)
>=20
> diff --git a/drivers/gpu/drm/nouveau/nouveau_abi16.c b/drivers/gpu/drm/no=
uveau/nouveau_abi16.c
> index cd14f993bdd1b..92f9127b284ac 100644
> --- a/drivers/gpu/drm/nouveau/nouveau_abi16.c
> +++ b/drivers/gpu/drm/nouveau/nouveau_abi16.c
> @@ -312,11 +312,21 @@ nouveau_abi16_ioctl_channel_alloc(ABI16_IOCTL_ARGS)
>  	if (device->info.family >=3D NV_DEVICE_INFO_V0_KEPLER) {
>  		if (init->fb_ctxdma_handle =3D=3D ~0) {
>  			switch (init->tt_ctxdma_handle) {
> -			case 0x01: engine =3D NV_DEVICE_HOST_RUNLIST_ENGINES_GR    ; break;
> -			case 0x02: engine =3D NV_DEVICE_HOST_RUNLIST_ENGINES_MSPDEC; break;
> -			case 0x04: engine =3D NV_DEVICE_HOST_RUNLIST_ENGINES_MSPPP ; break;
> -			case 0x08: engine =3D NV_DEVICE_HOST_RUNLIST_ENGINES_MSVLD ; break;
> -			case 0x30: engine =3D NV_DEVICE_HOST_RUNLIST_ENGINES_CE    ; break;
> +			case NOUVEAU_FIFO_ENGINE_GR:
> +				engine =3D NV_DEVICE_HOST_RUNLIST_ENGINES_GR;
> +				break;
> +			case NOUVEAU_FIFO_ENGINE_VP:
> +				engine =3D NV_DEVICE_HOST_RUNLIST_ENGINES_MSPDEC;
> +				break;
> +			case NOUVEAU_FIFO_ENGINE_PPP:
> +				engine =3D NV_DEVICE_HOST_RUNLIST_ENGINES_MSPPP;
> +				break;
> +			case NOUVEAU_FIFO_ENGINE_BSP:
> +				engine =3D NV_DEVICE_HOST_RUNLIST_ENGINES_MSVLD;
> +				break;
> +			case NOUVEAU_FIFO_ENGINE_CE:
> +				engine =3D NV_DEVICE_HOST_RUNLIST_ENGINES_CE;
> +				break;
>  			default:
>  				return nouveau_abi16_put(abi16, -ENOSYS);
>  			}
> diff --git a/drivers/gpu/drm/nouveau/nouveau_abi16.h b/drivers/gpu/drm/no=
uveau/nouveau_abi16.h
> index 11c8c4a80079b..661b901d8ecc9 100644
> --- a/drivers/gpu/drm/nouveau/nouveau_abi16.h
> +++ b/drivers/gpu/drm/nouveau/nouveau_abi16.h
> @@ -50,18 +50,6 @@ struct drm_nouveau_grobj_alloc {
>  	int      class;
>  };
> =20
> -struct drm_nouveau_notifierobj_alloc {
> -	uint32_t channel;
> -	uint32_t handle;
> -	uint32_t size;
> -	uint32_t offset;
> -};
> -
> -struct drm_nouveau_gpuobj_free {
> -	int      channel;
> -	uint32_t handle;
> -};
> -
>  struct drm_nouveau_setparam {
>  	uint64_t param;
>  	uint64_t value;
> diff --git a/include/uapi/drm/nouveau_drm.h b/include/uapi/drm/nouveau_dr=
m.h
> index 77d7ff0d5b110..5404d4cfff4c2 100644
> --- a/include/uapi/drm/nouveau_drm.h
> +++ b/include/uapi/drm/nouveau_drm.h
> @@ -73,6 +73,16 @@ struct drm_nouveau_getparam {
>  	__u64 value;
>  };
> =20
> +/*
> + * Those are used to support selecting the main engine used on Kepler.
> + * This goes into drm_nouveau_channel_alloc::tt_ctxdma_handle
> + */
> +#define NOUVEAU_FIFO_ENGINE_GR  0x01
> +#define NOUVEAU_FIFO_ENGINE_VP  0x02
> +#define NOUVEAU_FIFO_ENGINE_PPP 0x04
> +#define NOUVEAU_FIFO_ENGINE_BSP 0x08
> +#define NOUVEAU_FIFO_ENGINE_CE  0x30
> +
>  struct drm_nouveau_channel_alloc {
>  	__u32     fb_ctxdma_handle;
>  	__u32     tt_ctxdma_handle;
> @@ -95,6 +105,18 @@ struct drm_nouveau_channel_free {
>  	__s32 channel;
>  };
> =20
> +struct drm_nouveau_notifierobj_alloc {
> +	__u32 channel;
> +	__u32 handle;
> +	__u32 size;
> +	__u32 offset;
> +};
> +
> +struct drm_nouveau_gpuobj_free {
> +	__s32 channel;
> +	__u32 handle;
> +};
> +
>  #define NOUVEAU_GEM_DOMAIN_CPU       (1 << 0)
>  #define NOUVEAU_GEM_DOMAIN_VRAM      (1 << 1)
>  #define NOUVEAU_GEM_DOMAIN_GART      (1 << 2)

--=20
Cheers,
 Lyude Paul (she/her)
 Software Engineer at Red Hat