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bh=N3ZG5nlSne7db2l1bcwU+jExqpiSpjwO/TmBdJh8VJg=; b=h1lQs23axUwWnqIyA9JxGMJmi5F1PxAaYDOz0+Tg+U/+rPr2xHILA7K/mHlkXAyDbo 58zNAw9jYoiu2zW5YgAm9Oa08TprzB8EHIArwvcHqF6reKWrq6Imd2YB5yeuXJ4rrHna Ag69sFpElsAQE313cxXl5oBqdLCo8UoLjmPD7RulY0jHioDAT4T+DGEBrUTt1q4fEz43 TYLfE0AsGFi6UVQP4yS5dlC6O1xHb12vxRNIHLOswIfgT5EHtL4aaJnXwjvmiE2IvnYD 2DSSwYKokT7j6I7aAUfegXs/sPrW2n7Kjfa1kwtIlDMI27fDGdzbFadQGKusSLNMpMzW 5cDg== X-Forwarded-Encrypted: i=1; AJvYcCVomMnRylaQS3xkriU1aW85GNpdg3/pup8d0Xyd9YM5nq36KQE9DHr0pNKAFagdbObkgR+TrLHiuwoNOba6OyfzxAfTMX/hVD9u+59X X-Gm-Message-State: AOJu0YxdyyDZfe5XVFEX0qWr0teHCVpWYcOELhouHhrNiMKgQbJ5V8a3 UosKU4msPg2s0I5sloGjISPqkEx8heZZeLov35J9sDJ5Y4t4pNHLNqqzkX3r3FL23eFyfNCo0nf Nv5xA6lLYEmcNttCFdeeEl/wA+YDjG/VbvHzdeQ== X-Received: by 2002:a2e:80ca:0:b0:2d2:2c74:ff02 with SMTP id r10-20020a2e80ca000000b002d22c74ff02mr87597ljg.9.1709594492412; Mon, 04 Mar 2024 15:21:32 -0800 (PST) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240109-axi-spi-engine-series-3-v1-0-e42c6a986580@baylibre.com> <20240109-axi-spi-engine-series-3-v1-1-e42c6a986580@baylibre.com> <2c74aad9-3cb9-4222-8072-e72120c2658e@sirena.org.uk> In-Reply-To: <2c74aad9-3cb9-4222-8072-e72120c2658e@sirena.org.uk> From: David Lechner Date: Mon, 4 Mar 2024 17:21:21 -0600 Message-ID: Subject: Re: [PATCH 01/13] spi: add core support for controllers with offload capabilities To: Mark Brown Cc: Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Hennerich , =?UTF-8?B?TnVubyBTw6E=?= , Frank Rowand , Thierry Reding , =?UTF-8?Q?Uwe_Kleine=2DK=C3=B6nig?= , Jonathan Corbet , linux-spi@vger.kernel.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-pwm@vger.kernel.org, linux-kernel@vger.kernel.org, David Jander Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Wed, Jan 10, 2024 at 3:36=E2=80=AFPM Mark Brown wro= te: > > On Wed, Jan 10, 2024 at 01:49:42PM -0600, David Lechner wrote: > > This adds a feature for specialized SPI controllers that can record > > a series of SPI transfers, including tx data, cs assertions, delays, > > etc. and then play them back using a hardware trigger without CPU > > intervention. > > > The intended use case for this is with the AXI SPI Engine to capture > > data from ADCs at high rates (MSPS) with a stable sample period. > > > Most of the implementation is controller-specific and will be handled b= y > > drivers that implement the offload_ops callbacks. The API follows a > > prepare/enable pattern that should be familiar to users of the clk > > subsystem. > > This is a lot to do in one go, and I think it's a bit too off on the > side and unintegrated with the core. There's two very high level bits > here, there's the pre-cooking a message for offloading to be executed by > a hardware engine and there's the bit where that's triggered by some > hardwar event rather than by software. > .. > > The bit where messages are initiated by hardware is a step beyond that, > I think we need a bit more API for connecting up the triggers and we > also need to have something handling what happens with normal operation > of the device while these triggers are enabled. I think it could be > useful to split this bit out since there's a lot more to work out there > in terms of interfaces. Now that we have addressed the pre-cooking messages bit [1] I'm coming back to the hardware trigger bit. Since the hardware trigger part hasn't been discussed in the past, it's not so clear to me what is being requested here (also see specific questions below). [1]: https://lore.kernel.org/linux-spi/20240219-mainline-spi-precook-messag= e-v2-0-4a762c6701b9@baylibre.com/T/#t > > > +/** > > + * SPI_OFFLOAD_RX - placeholder for indicating read transfers for offl= oads > > + * > > + * Assign xfer->rx_buf to this value for any read transfer passed to > > + * spi_offload_prepare(). This will act as a flag to indicate to the o= ffload > > + * that it should do something with the data read during this transfer= What > > + * that something can be is determined by the specific hardware, e.g. = it could > > + * be piped to DMA or a DSP, etc. > > + */ > > +#define SPI_OFFLOAD_RX_SENTINEL ((void *)1) > > This feels like something where there are likely to be multiple options > and we need configurability. I'd also expect to see a similar transmit > option. Having something similar for TX makes sense. What other sorts of options are you envisioning here? > > > +int spi_offload_prepare(struct spi_offload *offload, struct spi_device= *spi, > > + struct spi_transfer *xfers, unsigned int num_xf= ers) > > I would expect us to just generically prepare a message, then pass a > prepared message into the API that enables a trigger. We would need > something that handles the difference between potentially offloading for > better performance and having a hardware trigger, I think that might be > a case of just not exposing the engine's prepare to client drivers and > then having the core track if it needs to do that when enabling a > hardware trigger. Not exposing the offload prepare to client drivers sounds reasonable. I'm not sure I understand the potential need for an offload without a hardware trigger though. > > > + /** > > + * @enable: Callback to enable the offload. > > + */ > > + int (*enable)(struct spi_offload *offload); > > + /** > > + * @disable: Callback to disable the offload. > > + */ > > + void (*disable)(struct spi_offload *offload); > > I'm not seeing anything in this API that provides a mechanism for > configuring what triggers things to start, even in the case where things > are triggered by hardware rather than initiated by software I'd expect > to see hardware with runtime configurability. The binding is a bit > unclear but it seems to be expecting this to be statically configured in > hardware and that there will be a 1:1 mapping between triggers and > scripts that can be configured, if nothing else I would expect that > there will be hardware with more possible triggers than scripts. For the use case of ADCs/DACs we would want a periodic trigger where the period of the trigger is runtime configurable (via sysfs). Is this the sort of thing you had in mind here? What other sorts of triggers do you have in mind? > > I'd also expect some treatement of what happens with the standard SPI > API while something is enabled. I suppose it makes sense to return -EBUSY from spi_sync()/spi_async()/spi_bus_lock() when a hardware trigger is enabled.