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From: Peng Fan <peng.fan@nxp.com>
To: Rob Herring <robh@kernel.org>, "Peng Fan (OSS)" <peng.fan@oss.nxp.com>
CC: Abel Vesa <abelvesa@kernel.org>, Michael Turquette
	<mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Krzysztof
 Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley
	<conor+dt@kernel.org>, Shawn Guo <shawnguo@kernel.org>, Sascha Hauer
	<s.hauer@pengutronix.de>, Pengutronix Kernel Team <kernel@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>, "linux-clk@vger.kernel.org"
	<linux-clk@vger.kernel.org>, "imx@lists.linux.dev" <imx@lists.linux.dev>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>, "linux-kernel@vger.kernel.org"
	<linux-kernel@vger.kernel.org>
Subject: RE: [PATCH v3 1/2] dt-bindindgs: clock: support NXP i.MX95 BLK CTL
 module
Thread-Topic: [PATCH v3 1/2] dt-bindindgs: clock: support NXP i.MX95 BLK CTL
 module
Thread-Index: AQHaahlgOv6evYTjhE2qVPUINi25/rEnr0QAgADi1dA=
Date: Tue, 5 Mar 2024 04:13:34 +0000
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References: <20240228-imx95-blk-ctl-v3-0-40ceba01a211@nxp.com>
 <20240228-imx95-blk-ctl-v3-1-40ceba01a211@nxp.com>
 <20240304143916.GA181628-robh@kernel.org>
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org; linux-kernel@vger.kernel.org; Peng Fan
> <peng.fan@nxp.com>
> Subject: Re: [PATCH v3 1/2] dt-bindindgs: clock: support NXP i.MX95 BLK C=
TL
> module
>=20
> On Wed, Feb 28, 2024 at 03:48:22PM +0800, Peng Fan (OSS) wrote:
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > i.MX95 includes BLK CTL module in several MIXes, such as VPU_CSR in
> > VPUMIX, BLK_CTRL_NETCMIX in NETCMIX, CAMERA_CSR in CAMERAMIX
> and etc.
> >
> > The BLK CTL module is used for various settings of a specific MIX,
> > such as clock, QoS and etc.
> >
> > This patch is to add some BLK CTL modules that has clock features.
>=20
> This sentence doesn't add anything you haven't already said.

Will drop it.
>=20
> >
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > ---
> >  .../devicetree/bindings/clock/imx95-blk-ctl.yaml   | 61
> ++++++++++++++++++++++
> >  include/dt-bindings/clock/nxp,imx95-clock.h        | 32 ++++++++++++
> >  2 files changed, 93 insertions(+)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/clock/imx95-blk-ctl.yaml
> > b/Documentation/devicetree/bindings/clock/imx95-blk-ctl.yaml
> > new file mode 100644
> > index 000000000000..c8974b927bee
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/clock/imx95-blk-ctl.yaml
> > @@ -0,0 +1,61 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
> > +---
> > +$id:
> > +https://eur01.safelinks.protection.outlook.com/?url=3Dhttp%3A%2F%2Fdev=
i
> > +cetree.org%2Fschemas%2Fclock%2Fimx95-blk-
> ctl.yaml%23&data=3D05%7C02%7Cp
> >
> +eng.fan%40nxp.com%7Cd0a6445fb5604872ec3a08dc3c58e0e9%7C686ea1
> d3bc2b4c
> >
> +6fa92cd99c5c301635%7C0%7C0%7C638451599621992781%7CUnknown%
> 7CTWFpbGZsb
> >
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> 0%3D
> >
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> RIykKzCRUok
> > +%3D&reserved=3D0
> > +$schema:
> > +https://eur01.safelinks.protection.outlook.com/?url=3Dhttp%3A%2F%2Fdev=
i
> > +cetree.org%2Fmeta-
> schemas%2Fcore.yaml%23&data=3D05%7C02%7Cpeng.fan%40nx
> >
> +p.com%7Cd0a6445fb5604872ec3a08dc3c58e0e9%7C686ea1d3bc2b4c6fa9
> 2cd99c5c
> >
> +301635%7C0%7C0%7C638451599622001649%7CUnknown%7CTWFpbGZs
> b3d8eyJWIjoiM
> >
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> C%7C%7
> >
> +C&sdata=3DRvMgj7vtwJ3WMYsD3gEO9U8ZI2fRsPy6WVYhCOJ0EfI%3D&reserv
> ed=3D0
> > +
> > +title: NXP i.MX95 Block Control
> > +
> > +maintainers:
> > +  - Peng Fan <peng.fan@nxp.com>
> > +
> > +properties:
> > +  compatible:
> > +    items:
> > +      - enum:
> > +          - nxp,imx95-cameramix-csr
> > +          - nxp,imx95-display-master-csr
> > +          - nxp,imx95-dispmix-lvds-csr
> > +          - nxp,imx95-dispmix-csr
> > +          - nxp,imx95-netcmix-blk-ctrl
> > +          - nxp,imx95-vpumix-csr
> > +      - const: syscon
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  power-domains:
> > +    maxItems: 1
> > +
> > +  clocks:
> > +    maxItems: 1
> > +
> > +  '#clock-cells':
> > +    const: 1
> > +    description:
> > +      The clock consumer should specify the desired clock by having th=
e
> clock
> > +      ID in its "clocks" phandle cell. See
> > +      include/dt-bindings/clock/nxp,imx95-clock.h
> > +
> > +  mux-controller:
> > +    type: object
> > +    $ref: /schemas/mux/reg-mux.yaml
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - '#clock-cells'
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  # Clock Control Module node:
> > +  - |
> > +    #include <dt-bindings/clock/nxp,imx95-clock.h>
> > +
> > +    syscon@4c410000 {
>=20
> clock-controller@...

But this is a syscon, using clock-controller will trigger dt
check warning.
>=20
> As that is the main feature/function.
>=20
> > +      compatible =3D "nxp,imx95-vpumix-csr", "syscon";
> > +      reg =3D <0x4c410000 0x10000>;
> > +      #clock-cells =3D <1>;
>=20
> Please make the example as full as possible. For example, add mux-control=
ler
> node. Do some of the blocks not have mux ctrl?

Yes. The blk ctrl is not just for clock, some registers has mux ctrl,
such as Pixel_link_sel.

Thanks,
Peng.