Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754810AbYADVeA (ORCPT ); Fri, 4 Jan 2008 16:34:00 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1753911AbYADVdu (ORCPT ); Fri, 4 Jan 2008 16:33:50 -0500 Received: from smtp-out.google.com ([216.239.45.13]:13689 "EHLO smtp-out.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753866AbYADVdt (ORCPT ); Fri, 4 Jan 2008 16:33:49 -0500 DomainKey-Signature: a=rsa-sha1; s=beta; d=google.com; c=nofws; q=dns; h=received:message-id:date:from:to:subject:in-reply-to: mime-version:content-type:references; b=ipjZe2bsMnq/1E6XzhwcVsrYEaPNKx/z/a5dZ3wwD7EAmNJHcANj25vWRq+6LJqrw lqldS7y+chxechl8yfSbA== Message-ID: <3f1a065b0801041333x579d0a8fs9c5535f95dd56015@mail.gmail.com> Date: Fri, 4 Jan 2008 13:33:33 -0800 From: "Russell Leidich" To: "Andi Kleen" , "Torsten Kaiser" , "Andrew Morton" , linux-kernel@vger.kernel.org, "Thomas Gleixner" , "Ingo Molnar" , valdis.kletnieks@vt.edu, thockin@google.com Subject: Re: [PATCH] AMD Thermal Interrupt Support In-Reply-To: <20080102215433.GB13784@one.firstfloor.org> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="----=_Part_3809_21763170.1199482413504" References: <20071225140413.e8b4f2cd.akpm@linux-foundation.org> <20071227233419.d1adf3f3.akpm@linux-foundation.org> <3f1a065b0712281240p14c8223agfe83db0ac26aca4c@mail.gmail.com> <3f1a065b0801021143y5fc15e29r4201ac19bc7c1daa@mail.gmail.com> <20080102200039.GA13784@one.firstfloor.org> <3f1a065b0801021312w6f823cbeh9ea6b73d2b0c46c8@mail.gmail.com> <64bb37e0801021333g3cccff81k68df75463e4a21d0@mail.gmail.com> <3f1a065b0801021350x7fd065fbj9680ce1a4f3c6538@mail.gmail.com> <20080102215433.GB13784@one.firstfloor.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 19265 Lines: 276 ------=_Part_3809_21763170.1199482413504 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Content-Disposition: inline Here's a new version of the patch. Since I didn't explain its purpose very well in my previous submission, I'll do so here: This patch adds thermal machine check event (MCE) support to AMD Barcelona (and probably later, if new PCI IDs are added to k8_northbridges[]), styled after the same in the Intel code. The initialization consists of 3 parts: (1) northbridge, which enables the delivery of the interrupt to the local APIC, (2) APIC, which enables delivery to X86, and (3) hotplug support in threshold_cpu_callback(), which accomplishes #2 for CPUs which (re)enter the OS later. Whenever the temperature reaches the throttling threshold programmed into a northbridge register (by the BIOS -- my code doesn't change this value), a thermal interrupt is delivered. The interrupt is delivered to the vector specified in the thermal APIC register at (APIC_BASE + 0x330), which is identical to Intel. Because the vector register is the same between both architectures, and because I don't know which brand of CPU is present until runtime (if either), thermal_interrupt in entry_64.S will branch to smp_thermal_interrupt in mce_thermal.c. In turn, smp_thermal_interrupt will branch to the CPU-specific code for handling the interrupt. (Apart from the common vector location, AMD and Intel use radically different architectures for the purpose of reporting throttling events.) At that point, an MCE is logged if and only if the temperature has made a low-to-high transition. Rate limiting is employed so as not to spam the log. New with this patch: I added some comments, as Andi suggested. I also restored a redundant check for (cpu < NR_CPUS) which happened to be in mce_amd_64.c, and I originally removed; I restored it because it was deemed unrelated to my thermal throttling enhancement. As to the question of Athlon RevG, it turns out that it has the same thermal erratum as RevF. Therefore the fact that this code only works with Barcelona and up is not a defficiency. There are 2 pending issues, to which I have received insufficient feedback: 1. Andi would like to eliminate the trampoline in mce_thermal.c, but no one has responded to my proposed disgusting hack on entry_64.S in order to do so. 2. Ingo pointed out that a given config file did not build. But when I tried to use it, I got all kinds of questions about the required states of various build flags. I accepted all the defaults, and the build completed normally. His error message suggests to me that somehow he's not including include/asm-x86/mce.h in the build, but I'm at a loss as to why. So I reverted my changes to this file, and created mce_thermal.h instead, for tighter control. -- Russell Leidich ------=_Part_3809_21763170.1199482413504 Content-Type: text/plain; name=patch.txt Content-Transfer-Encoding: base64 X-Attachment-Id: f_fb15kcay0 Content-Disposition: attachment; filename=patch.txt ZGlmZiAtdXByTiBsaW51eC0yLjYuMjQtcmM1Lm9yaWcvYXJjaC94ODYva2VybmVsL2NwdS9tY2hl Y2svTWFrZWZpbGUgL2hvbWUvcm1sL2xpbnV4LTIuNi4yNC1yYzUvYXJjaC94ODYva2VybmVsL2Nw dS9tY2hlY2svTWFrZWZpbGUKLS0tIGxpbnV4LTIuNi4yNC1yYzUub3JpZy9hcmNoL3g4Ni9rZXJu ZWwvY3B1L21jaGVjay9NYWtlZmlsZQkyMDA3LTEyLTExIDE0OjMwOjUzLjUzMzI5NzAwMCAtMDgw MAorKysgL2hvbWUvcm1sL2xpbnV4LTIuNi4yNC1yYzUvYXJjaC94ODYva2VybmVsL2NwdS9tY2hl Y2svTWFrZWZpbGUJMjAwNy0xMi0xMSAxMTo1NjoyMC41NDkxODUwMDAgLTA4MDAKQEAgLTEsNCAr MSw0IEBACi1vYmoteQkJCQk9ICBtY2VfJChCSVRTKS5vIHRoZXJtX3Rocm90Lm8KK29iai15CQkJ CT0gIG1jZV8kKEJJVFMpLm8gdGhlcm1fdGhyb3QubyBtY2VfdGhlcm1hbC5vCiAKIG9iai0kKENP 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