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AJvYcCUnsx/XB7TTAsrHBCXVKrx/cJuOBYL/8Rb9tkFXmJMv3zcFMXi0voT6Bu8aa59/Daw4yii47nBftCa21szMjIE4iCcmwzQYHwyYsJ8sHUTaDLb0flr3pEp8hBXYpWRy0OhxYQ+DjvD7 X-Gm-Message-State: AOJu0YwM7gEFgghHGdj0BrGRzEvSTTDEp/Nt4BUU63eS6R+yoO4uI96z +25Bllh9IZXC2IiNpcsjQ6CXHgesEgzb1tw2GQ26Vk1h59X88nWD X-Received: by 2002:a05:6a20:42a5:b0:1a1:4697:585e with SMTP id o37-20020a056a2042a500b001a14697585emr1318266pzj.18.1709630861848; Tue, 05 Mar 2024 01:27:41 -0800 (PST) Received: from localhost.localdomain ([2402:3a80:863:befc:ec5c:8cb:6f1e:1f69]) by smtp.gmail.com with ESMTPSA id y16-20020a056a00181000b006e63039486esm1812329pfa.189.2024.03.05.01.27.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Mar 2024 01:27:41 -0800 (PST) Message-ID: <65e6e58d.050a0220.6580e.7a57@mx.google.com> X-Google-Original-Message-ID: <20240103122005.GA3347@francesco-nb> (raw) From: pratikmanvar09@gmail.com To: francesco@dolcini.it Cc: festevam@gmail.com, jun.li@nxp.com, kernel@pengutronix.de, linux-arm-kernel@lists.infradead.org, linux-imx@nxp.com, linux-kernel@vger.kernel.org, linux-pwm@vger.kernel.org, oe-kbuild-all@lists.linux.dev, pratik.manvar@ifm.com, pratikmanvar09@gmail.com, s.hauer@pengutronix.de, shawnguo@kernel.org, thierry.reding@gmail.com, u.kleine-koenig@pengutronix.de, xiaoning.wang@nxp.com Subject: Re: [PATCH v3] pwm: imx27: workaround of the pwm output bug Date: Tue, 5 Mar 2024 14:57:29 +0530 X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240103110200.1018-1-pratikmanvar09@gmail.com> References: <20240103122005.GA3347@francesco-nb> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Hello Francesco,=0D =0D Sorry for the abysmal delay.=0D Thanks for your review and suggestions.=0D =0D >Hello Pratik,=0D >=0D >On Wed, Jan 03, 2024 at 04:32:00PM +0530, pratikmanvar09@gmail.com wrote:= =0D >> From: Clark Wang =0D >> =0D >> This fixes the pwm output bug when decrease the duty cycle.=0D >> This is a limited workaround for the PWM IP issue TKT0577206.=0D >> =0D >> Root cause:=0D >> When the SAR FIFO is empty, the new write value will be directly applied= =0D >> to SAR even the current period is not over.=0D >> If the new SAR value is less than the old one, and the counter is=0D >> greater than the new SAR value, the current period will not filp the=0D >> level. This will result in a pulse with a duty cycle of 100%.=0D >> =0D >> Workaround:=0D >> Add an old value SAR write before updating the new duty cycle to SAR.=0D >> This will keep the new value is always in a not empty fifo, and can be=0D >> wait to update after a period finished.=0D >> =0D >> Limitation:=0D >> This workaround can only solve this issue when the PWM period is longer= =0D >> than 2us(or <500KHz).=0D >> =0D >> Reviewed-by: Jun Li =0D >> Signed-off-by: Clark Wang =0D >> Link: https://github.com/nxp-imx/linux-imx/commit/16181cc4eee61d87cbaba0= e5a479990507816317=0D >> Tested-by: Pratik Manvar =0D >> Signed-off-by: Pratik Manvar =0D >=0D >A very similar patch was already send in 2021 [1], did it had review=0D >comments not addressed? Please have a look.=0D >=0D >In general please refrain from sending a new patch version every other=0D >day, while every Linux kernel subsystem has different rules and a=0D >difference pace of development, in this specific case sending a v3 just=0D >adding your signed-off-by without allowing a little bit of time to wait=0D >for more feedback is just not sane.=0D Ok, I will keep this in mind. Thanks!=0D >=0D >[1] https://lore.kernel.org/all/?q=3Ddfn%3Adrivers%2Fpwm%2Fpwm-imx27.c+AND= +b%3A%22Clark+Wang%22=0D Ok, I did not check this. I will look into this. Thanks!=0D =0D Thanks & Regards,=0D Pratik Manvar=