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From: Frank Li <Frank.Li@nxp.com>
Date: Tue, 05 Mar 2024 10:54:58 -0500
Subject: [PATCH v3 4/4] dts: arm64: imx8dxl-evk: add lpuart1 and cm40 uart
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To: Rob Herring <robh@kernel.org>, 
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 Fabio Estevam <festevam@gmail.com>
Cc: devicetree@vger.kernel.org, imx@lists.linux.dev, 
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 =?utf-8?B?ZXBmNW55VGtJSlppQy95dCttVkJ0SkxQbWNWdkpZRHdZNjN0Q3dVQUlEaVh2?=
 =?utf-8?B?b3YxaStQc3RvSHdnd1JxVjhjWG1STW9ZOS9qeHRpNlBxL3F4cnRmaGYwdVZ6?=
 =?utf-8?B?S2lLVll5Q09CM2NQckFackc0ZHhqeThDQUN0Qm9hc0EwNGlkbEV2K0tsNEhs?=
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 =?utf-8?B?QkNjQ0JjSGVWcEVsTmdIYU5tM1JyVFM2czUwNkp0bS9sOHJlMGtxU2VtWWJx?=
 =?utf-8?B?cDBrMllseTVRbld3S29ySU85ZittOEpDSnRodDRKekFUVUl0Vk14bVpBYm5w?=
 =?utf-8?B?UTBJUFcrNWliVDVGeGo3eW9QRkxyMk0yeWVETSt1cDdzLzBmSXBqQWhTaXp6?=
 =?utf-8?B?QWgzN05NTXlUZGo4cHpQMGFxYSt1UWtLUzBmV3dVWjZGNVRySkl5SWxlNFVG?=
 =?utf-8?B?MWw3R1FvbXBGbTZyN3A5bVgrSmtUTnpLZHVFQjZrbVJPdVVVZDYzOXEvUlk3?=
 =?utf-8?B?SGpuRGNyY3I3UDdOUXI3VzQ3VzlTL0Rucjh6cWV4elJObDNzeldBdWovcUZx?=
 =?utf-8?B?T2wwSGxjenc5bUo5WmxvOHFkZUtDNUZnWjJMT01GbG1qWUJiZzV2WEo0NEI1?=
 =?utf-8?B?c2ZmTmlaNmdzU3RDUldHTllML0NRTkNGNTdPNUZZYnRtT1JFWG82VDFDb3d2?=
 =?utf-8?B?aEtNOUFzQnp2OHVNaCtMbnozWEpyTFVnWEVzeHg5WEtSTy82TWxXTFBHR3hL?=
 =?utf-8?B?emRkK2xSTThwL1FOUENjSm9vZ3d2ZVZMRHJpTjVleFNmTjFzcmRNTjY4N1JM?=
 =?utf-8?B?eGRvaDk1N0Z0a3dBejdRWVZmSDBpMFBXOVNlZStYWWhqeXF4ZlVETGtUMEJz?=
 =?utf-8?B?WUp5RnFjaGFVWmcwSUtPRGM4RWNJRG5FS3ZzTVRpMm5NbVJPY1pSYWlEYlB5?=
 =?utf-8?B?RWExWUVBK01LN1Z5Z05IRGEzOGx2VWM4bHhhOCtqT2NTU0VUTFlzZ0J2Rkdi?=
 =?utf-8?B?S1kyWjJLa3VrNmNFcklVbXBRdlcydmJLb1VEUE51aUxQV0RaMmJHWVhqSmV3?=
 =?utf-8?B?R3RhRGE3WUdMc1YxVDFTaS81WmxHQUNGN01XbVkzVytrU2hyblZHVHhsOCtN?=
 =?utf-8?B?NHRzSVpqTjNqOVBHN0hiRTJGMHlGdE9RaTlSUWVBREdBcnZnaDNzT294cjA5?=
 =?utf-8?B?cEZKZ1VIb1FKZmhzcnM4M0w4aXlyZ0xkUC8wS2lXdHRvaTFCNGtvRjVLT2Nl?=
 =?utf-8?B?aE1UV29hd2V1VjNFN2ErYVFCK2J2elFvUi9KbjIvQktQREpReWdqZURKMkVU?=
 =?utf-8?B?MjNPelJ4MzhhRlRyZ1U1Q1hOWmZramRxVVE0aXNpVVQrTmNwK1dDSk1sTW5h?=
 =?utf-8?B?T1hSZ1JmZVpXM1FoVHZ2WnpNRjZTUTU5NlFxR2tPWVpSZTNEelB2OHMrNDBQ?=
 =?utf-8?B?bUE2V1hzMFdXcWVMaTdWWU9VcWJhWWZPTzJXVzRSQ3VvWnN3VlFiVlBZT2d3?=
 =?utf-8?B?WmViM1lmUklOSjRWVWFuNis2R09lZmJ1cnZoTCtSWWZRRDBTMHorcDZZbGh3?=
 =?utf-8?B?ajU0N3k1Tm04RXh6bGZ3akJrS1I0VG5neWdwc2J6QVg0TVRzeHpLZ09JeStu?=
 =?utf-8?B?MVBGaU9aZk9ETUpsWnVjZE1IaUNzTW40ZjAzOGFLRnlUeU0wVTJGR3BhVDhR?=
 =?utf-8?Q?5GnrUbeDhtRxUsD55Miha7Hva?=
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Add lpuart1 and cm40 uart.

Signed-off-by: Frank Li <Frank.Li@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8dxl-evk.dts | 37 +++++++++++++++++++++++++++
 1 file changed, 37 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
index 2123d431e0613..737bacacc2da1 100644
--- a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts
@@ -16,6 +16,8 @@ aliases {
 		mmc0 = &usdhc1;
 		mmc1 = &usdhc2;
 		serial0 = &lpuart0;
+		serial1 = &lpuart1;
+		serial6 = &cm40_lpuart;
 	};
 
 	chosen {
@@ -51,6 +53,16 @@ linux,cma {
 		};
 	};
 
+	m2_uart1_sel: fixedregulator-101 {
+		compatible = "regulator-fixed";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-name = "m2_uart1_sel";
+		gpio = <&pca6416_1 6 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+		regulator-always-on;
+	};
+
 	mux3_en: regulator-0 {
 		compatible = "regulator-fixed";
 		regulator-min-microvolt = <3300000>;
@@ -340,6 +352,12 @@ &lpuart0 {
 	status = "okay";
 };
 
+&lpuart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_lpuart1>;
+	status = "okay";
+};
+
 &flexcan2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_flexcan2>;
@@ -354,6 +372,16 @@ &flexcan3 {
 	status = "okay";
 };
 
+&cm40_intmux {
+	status = "disabled";
+};
+
+&cm40_lpuart {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_cm40_lpuart>;
+	status = "disabled";
+};
+
 &lsio_gpio4 {
 	status = "okay";
 };
@@ -595,6 +623,15 @@ IMX8DXL_UART0_TX_ADMA_UART0_TX		0x06000020
 		>;
 	};
 
+	pinctrl_lpuart1: lpuart1grp {
+		fsl,pins = <
+			IMX8DXL_UART1_TX_ADMA_UART1_TX          0x06000020
+			IMX8DXL_UART1_RX_ADMA_UART1_RX          0x06000020
+			IMX8DXL_UART1_RTS_B_ADMA_UART1_RTS_B    0x06000020
+			IMX8DXL_UART1_CTS_B_ADMA_UART1_CTS_B    0x06000020
+		>;
+	};
+
 	pinctrl_usdhc1: usdhc1grp {
 		fsl,pins = <
 			IMX8DXL_EMMC0_CLK_CONN_EMMC0_CLK	0x06000041

-- 
2.34.1