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charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20240306085017.21731-2-Parthiban.Veerasooran@microchip.com> > +NORX (Bit 29) - No Receive flag. The SPI host may set this bit to prevent > + the MAC-PHY from conveying RX data on the MISO for the > + current chunk (DV = 0 in the footer), indicating that the > + host would not process it. Typically, the SPI host should > + set NORX = 0 indicating that it will accept and process > + any receive frame data within the current chunk. > + > +RSVD (Bit 28..24) - Reserved: All reserved bits shall be ‘0’. > + > +VS (Bit 23..22) - Vendor Specific. These bits are implementation specific. > + If the MAC-PHY does not implement these bits, the host > + shall set them to ‘0’. > + > +DV (Bit 21) - Data Valid flag. The SPI host uses this bit to indicate > + whether the current chunk contains valid transmit frame data > + (DV = 1) or not (DV = 0). When ‘0’, the MAC-PHY ignores the > + chunk payload. Note that the receive path is unaffected by > + the setting of the DV bit in the data header. There is some odd indentation going on here. Maybe tab vs spaces? Otherwise, this is nice documentation. Thanks. Andrew