Received: by 2002:a89:2c3:0:b0:1ed:23cc:44d1 with SMTP id d3csp1077467lqs; Wed, 6 Mar 2024 05:52:18 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCX4uyLmpiIEIUBIUWMNdNAyzmqTvpt9Fl4JsCGQ6vDmqznz1nHYqIMWhROp529vuT+SyvyOUSI8jHU9a5a0PqtPu0OsJDstYMeAozvy+w== X-Google-Smtp-Source: AGHT+IHorP1PFWKbUDD6PnaDFjxZ5FlNbVn2CmOsPubLqUT14sQMzk/5eBw+PIwDt5BvrogzNi2r X-Received: by 2002:a9d:7859:0:b0:6e4:8d56:dffc with SMTP id c25-20020a9d7859000000b006e48d56dffcmr5109782otm.4.1709733138070; Wed, 06 Mar 2024 05:52:18 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1709733138; cv=pass; d=google.com; s=arc-20160816; b=sFzASGl/jIVLjCCkmFt5w4bmDF4duandebevg2MYwqPLf91EQicdtvG+KN19ptb3Hr +sT4BRDS55/T5/yQ+wPoJBD417MyAfCZlw2CKlGRxdffN1suqVMdSctHvmYvHlAJIibt aLk1PrpNc1Cs1aZjxnAQ/oZzXKDbYczhVJrP8uJMbMvv90ZAFObS/dkLRtTMqUKjBijL ivM0d8U4kmOqwPKeN3bv7jiIgEYUunaLKLztfxSEsjZ2UkOjYIJg4//3WBvFJMWmBO5W 8ykH0wH1fffqxs9i6VQ9mQOxVyud5tFak4nHUnO0xbYAU6QnjQfgdbGi86A6rFCpo3DI n6PQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=in-reply-to:content-disposition:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:references:message-id:subject:cc :to:from:date:dkim-signature; bh=MFhy2FxcxMVo6tkvEy7L7ZsVSs5rMqWQS1wWFjmgvbE=; fh=A4iw5QxNVdA3riROn5Qb3bx4lYbSO9D5/HiDyRZmbBM=; b=Y81BtRgsAgsOv6YkLKBjhuzsALhXcwmZcJKcpAvyd2ciXFcuffM1XDpNZqcV+BiBSg KJ3uTNp4UsFsg1YIA4+m6fNt4fR/rJ0+lunPjlGVXOBHJgIqmwTKiiSsH2zJqfr27YaZ EAFoZkmvJmFcC8wh8bf7F3NiDNNGUztKsR12x7R1N7Q1qqRsHX8aL6SlE/Y+7s57eYgg R8MmVw6izwuDYG0PtdN6LAki7QswOmfCmDJ1JA1dtIfg+QP2Csj3tWk5T6JTl7ErBuN0 pzk1E123TWFjH/ga3FOHA7FBN+FDcxbkh1jmTitZe+ylBzQHpkEDSTTrl8gl4ii2F4JM KLhA==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=EQnF6Z1I; arc=pass (i=1 dkim=pass dkdomain=intel.com dmarc=pass fromdomain=linux.intel.com); spf=pass (google.com: domain of linux-kernel+bounces-93662-linux.lists.archive=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-93662-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. [139.178.88.99]) by mx.google.com with ESMTPS id s15-20020a63214f000000b005d8b48044d3si11870470pgm.723.2024.03.06.05.52.17 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Mar 2024 05:52:18 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-93662-linux.lists.archive=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) client-ip=139.178.88.99; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=EQnF6Z1I; arc=pass (i=1 dkim=pass dkdomain=intel.com dmarc=pass fromdomain=linux.intel.com); spf=pass (google.com: domain of linux-kernel+bounces-93662-linux.lists.archive=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-93662-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id 5EE8A2872AC for ; Wed, 6 Mar 2024 09:48:02 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 7FE235EE75; Wed, 6 Mar 2024 09:47:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="EQnF6Z1I" Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A85C95DF3B; Wed, 6 Mar 2024 09:47:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.8 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709718457; cv=none; b=XjoorcbkcKlhT0VygS50VChtUfjBtiNeLxE2Fm8wgKhveJv/bcUVbcLPXTx+mxkdZbmmQwX0lvHVlury3aX3QvOCO9NFHa4Xsd1wiWGl67ojeYGryASDJGAsLrPnwJsemsym5mNpY0IuSRYyccH+5EYFZWUvoppKgXRzkD77ev8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709718457; c=relaxed/simple; bh=0Z6Bqj7WGyMcJwm4bMhfmiCLbED3HC5PGJMJVusSN8c=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=APsDC/sZBVTd5fep9/U0HV3EafyL3gcReSGCs8VNQyCjqSOuT6QE4tgdE936mwitV4zL9uY7bnkIP2wzHWVQM87cwJUbciy/JJmejEWw8FOUxndbLRPuNHPqGnpFYGUBbspNxBRbh4NSn9NttWrRj8paioNw8r6N885YKBufg7g= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=EQnF6Z1I; arc=none smtp.client-ip=192.198.163.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1709718456; x=1741254456; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=0Z6Bqj7WGyMcJwm4bMhfmiCLbED3HC5PGJMJVusSN8c=; b=EQnF6Z1IAOWU9vu8XJ88awbq6tRItauOHwk+SzMdN0heujQlicnrmdYN jJ4Wm68cYOZMaQyzX22Tt+ZKnv1gh3d+2z1WP3JW/5iHBC7/tw+qv1dHz 7+sJvb4TYzcui6aMYrA1uSJW67vZ4BH+IcgJBQUikU3k0PXI4McZVK75B ZvmT3LtTLCURhTTcS7kJDjEJuHsI+1BPj9WXU7r/lTk1/KZ3+96xMXy3m URZmh5nmykzow+h0r49VLxX51u0falDNZx1D59RUQ0l3rBATjuMlYTeQh pJb1TsYfQE9sJdGiG4uIkt4TWBSPRx2opaYJ8wAsCS048Yu26OldhW3/O Q==; X-IronPort-AV: E=McAfee;i="6600,9927,11004"; a="21843505" X-IronPort-AV: E=Sophos;i="6.06,207,1705392000"; d="scan'208";a="21843505" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2024 01:47:35 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.06,207,1705392000"; d="scan'208";a="14360830" Received: from yilunxu-optiplex-7050.sh.intel.com (HELO localhost) ([10.239.159.165]) by orviesa003.jf.intel.com with ESMTP; 06 Mar 2024 01:47:31 -0800 Date: Wed, 6 Mar 2024 17:43:16 +0800 From: Xu Yilun To: Sean Christopherson Cc: Paolo Bonzini , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Yan Zhao , Isaku Yamahata , Michael Roth , Yu Zhang , Chao Peng , Fuad Tabba , David Matlack Subject: Re: [PATCH 05/16] KVM: x86/mmu: Use synthetic page fault error code to indicate private faults Message-ID: References: <20240228024147.41573-1-seanjc@google.com> <20240228024147.41573-6-seanjc@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20240228024147.41573-6-seanjc@google.com> On Tue, Feb 27, 2024 at 06:41:36PM -0800, Sean Christopherson wrote: > Add and use a synthetic, KVM-defined page fault error code to indicate > whether a fault is to private vs. shared memory. TDX and SNP have > different mechanisms for reporting private vs. shared, and KVM's > software-protected VMs have no mechanism at all. Usurp an error code > flag to avoid having to plumb another parameter to kvm_mmu_page_fault() > and friends. > > Alternatively, KVM could borrow AMD's PFERR_GUEST_ENC_MASK, i.e. set it > for TDX and software-protected VMs as appropriate, but that would require > *clearing* the flag for SEV and SEV-ES VMs, which support encrypted > memory at the hardware layer, but don't utilize private memory at the > KVM layer. I see this alternative in other patchset. And I still don't understand why synthetic way is better after reading patch #5-7. I assume for SEV(-ES) if there is spurious PFERR_GUEST_ENC flag set in error code when private memory is not used in KVM, then it is a HW issue or SW bug that needs to be caught and warned, and by the way cleared. Thanks, Yilun > > Opportunistically add a comment to call out that the logic for software- > protected VMs is (and was before this commit) broken for nested MMUs, i.e. > for nested TDP, as the GPA is an L2 GPA. Punt on trying to play nice with > nested MMUs as there is a _lot_ of functionality that simply doesn't work > for software-protected VMs, e.g. all of the paths where KVM accesses guest > memory need to be updated to be aware of private vs. shared memory. > > Signed-off-by: Sean Christopherson > --- > arch/x86/include/asm/kvm_host.h | 11 +++++++++++ > arch/x86/kvm/mmu/mmu.c | 26 +++++++++++++++++++------- > arch/x86/kvm/mmu/mmu_internal.h | 2 +- > 3 files changed, 31 insertions(+), 8 deletions(-) > > diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h > index 1e69743ef0fb..4077c46c61ab 100644 > --- a/arch/x86/include/asm/kvm_host.h > +++ b/arch/x86/include/asm/kvm_host.h > @@ -267,7 +267,18 @@ enum x86_intercept_stage; > #define PFERR_GUEST_ENC_MASK BIT_ULL(34) > #define PFERR_GUEST_SIZEM_MASK BIT_ULL(35) > #define PFERR_GUEST_VMPL_MASK BIT_ULL(36) > + > +/* > + * IMPLICIT_ACCESS is a KVM-defined flag used to correctly perform SMAP checks > + * when emulating instructions that triggers implicit access. > + */ > #define PFERR_IMPLICIT_ACCESS BIT_ULL(48) > +/* > + * PRIVATE_ACCESS is a KVM-defined flag us to indicate that a fault occurred > + * when the guest was accessing private memory. > + */ > +#define PFERR_PRIVATE_ACCESS BIT_ULL(49) > +#define PFERR_SYNTHETIC_MASK (PFERR_IMPLICIT_ACCESS | PFERR_PRIVATE_ACCESS) > > #define PFERR_NESTED_GUEST_PAGE (PFERR_GUEST_PAGE_MASK | \ > PFERR_WRITE_MASK | \ > diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c > index 408969ac1291..7807bdcd87e8 100644 > --- a/arch/x86/kvm/mmu/mmu.c > +++ b/arch/x86/kvm/mmu/mmu.c > @@ -5839,19 +5839,31 @@ int noinline kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, u64 err > bool direct = vcpu->arch.mmu->root_role.direct; > > /* > - * IMPLICIT_ACCESS is a KVM-defined flag used to correctly perform SMAP > - * checks when emulating instructions that triggers implicit access. > * WARN if hardware generates a fault with an error code that collides > - * with the KVM-defined value. Clear the flag and continue on, i.e. > - * don't terminate the VM, as KVM can't possibly be relying on a flag > - * that KVM doesn't know about. > + * with KVM-defined sythentic flags. Clear the flags and continue on, > + * i.e. don't terminate the VM, as KVM can't possibly be relying on a > + * flag that KVM doesn't know about. > */ > - if (WARN_ON_ONCE(error_code & PFERR_IMPLICIT_ACCESS)) > - error_code &= ~PFERR_IMPLICIT_ACCESS; > + if (WARN_ON_ONCE(error_code & PFERR_SYNTHETIC_MASK)) > + error_code &= ~PFERR_SYNTHETIC_MASK; > > if (WARN_ON_ONCE(!VALID_PAGE(vcpu->arch.mmu->root.hpa))) > return RET_PF_RETRY; > > + /* > + * Except for reserved faults (emulated MMIO is shared-only), set the > + * private flag for software-protected VMs based on the gfn's current > + * attributes, which are the source of truth for such VMs. Note, this > + * wrong for nested MMUs as the GPA is an L2 GPA, but KVM doesn't > + * currently supported nested virtualization (among many other things) > + * for software-protected VMs. > + */ > + if (IS_ENABLED(CONFIG_KVM_SW_PROTECTED_VM) && > + !(error_code & PFERR_RSVD_MASK) && > + vcpu->kvm->arch.vm_type == KVM_X86_SW_PROTECTED_VM && > + kvm_mem_is_private(vcpu->kvm, gpa_to_gfn(cr2_or_gpa))) > + error_code |= PFERR_PRIVATE_ACCESS; > + > r = RET_PF_INVALID; > if (unlikely(error_code & PFERR_RSVD_MASK)) { > r = handle_mmio_page_fault(vcpu, cr2_or_gpa, direct); > diff --git a/arch/x86/kvm/mmu/mmu_internal.h b/arch/x86/kvm/mmu/mmu_internal.h > index 1fab1f2359b5..d7c10d338f14 100644 > --- a/arch/x86/kvm/mmu/mmu_internal.h > +++ b/arch/x86/kvm/mmu/mmu_internal.h > @@ -306,7 +306,7 @@ static inline int kvm_mmu_do_page_fault(struct kvm_vcpu *vcpu, gpa_t cr2_or_gpa, > .max_level = KVM_MAX_HUGEPAGE_LEVEL, > .req_level = PG_LEVEL_4K, > .goal_level = PG_LEVEL_4K, > - .is_private = kvm_mem_is_private(vcpu->kvm, cr2_or_gpa >> PAGE_SHIFT), > + .is_private = err & PFERR_PRIVATE_ACCESS, > }; > int r; > > -- > 2.44.0.278.ge034bb2e1d-goog > >