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Wed, 6 Mar 2024 16:01:17 +0000 From: Joshua Yeong To: Frank Li CC: "alexandre.belloni@bootlin.com" , "conor.culhane@silvaco.com" , "devicetree@vger.kernel.org" , "gregkh@linuxfoundation.org" , "ilpo.jarvinen@linux.intel.com" , "imx@lists.linux.dev" , "jirislaby@kernel.org" , "joe@perches.com" , "krzysztof.kozlowski+dt@linaro.org" , "krzysztof.kozlowski@linaro.org" , "linux-i3c@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "linux-serial@vger.kernel.org" , "miquel.raynal@bootlin.com" , "robh@kernel.org" , "zbigniew.lukwinski@linux.intel.com" Subject: RE: [PATCH v7 5/8] i3c: target: add svc target controller support Thread-Topic: [PATCH v7 5/8] i3c: target: add svc target controller support Thread-Index: AQHaWIvaQw3YyHT02UKJrOMhyC7OnbErDKXQ Date: Wed, 6 Mar 2024 16:01:17 +0000 Message-ID: References: <20240205233326.552576-1-Frank.Li@nxp.com> <20240205233326.552576-6-Frank.Li@nxp.com> In-Reply-To: <20240205233326.552576-6-Frank.Li@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=starfivetech.com; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-OriginatorOrg: starfivetech.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: SH0PR01MB0841.CHNPR01.prod.partner.outlook.cn X-MS-Exchange-CrossTenant-Network-Message-Id: 3006193a-a604-486a-d8dc-08dc3df6a822 X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Mar 2024 16:01:17.1853 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 06fe3fa3-1221-43d3-861b-5a4ee687a85c X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: jaQX3N6ZatN2jQjb7BATAIVcmPLNhPCPV1hVfIPNQ/MwhPiH0PioyKCZ8ZqZuQ2FbjHwrt7y6DBsVG+jjdYDVFe3nCSucZ54S/i8BFYQaQQ= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SH0PR01MB0571 Hi Frank, > -----Original Message----- > From: linux-i3c On Behalf Of Fran= k Li > Sent: Tuesday, February 6, 2024 7:33 AM > To: frank.li@nxp.com > Cc: alexandre.belloni@bootlin.com; conor.culhane@silvaco.com; > devicetree@vger.kernel.org; gregkh@linuxfoundation.org; > ilpo.jarvinen@linux.intel.com; imx@lists.linux.dev; jirislaby@kernel.org; > joe@perches.com; krzysztof.kozlowski+dt@linaro.org; > krzysztof.kozlowski@linaro.org; linux-i3c@lists.infradead.org; linux- > kernel@vger.kernel.org; linux-serial@vger.kernel.org; > miquel.raynal@bootlin.com; robh@kernel.org; > zbigniew.lukwinski@linux.intel.com > Subject: [PATCH v7 5/8] i3c: target: add svc target controller support >=20 > Add Silvaco I3C target controller support >=20 > Signed-off-by: Frank Li > --- >=20 > Notes: > Change from v2 to v3 > - fix build warning >=20 > drivers/i3c/master/Makefile | 2 +- > drivers/i3c/master/svc-i3c-main.c | 35 +- > drivers/i3c/master/svc-i3c-target.c | 776 I think putting target mode files under "master" might not make sense. We m= ight have to consider that we may have a "secondary master" mode. Some other ways of spl= itting or handling of target mode is needed here. .. > + > +#define I3C_SCONFIG 0x4 > +#define I3C_SCONFIG_SLVENA_MASK BIT(0) > +#define I3C_SCONFIG_OFFLINE_MASK BIT(9) > +#define I3C_SCONFIG_SADDR_MASK GENMASK(31, 25) > + > +#define I3C_SSTATUS 0x8 > +#define I3C_SSTATUS_STNOTSTOP_MASK BIT(0) > +#define I3C_SSTATUS_STOP_MASK BIT(10) > +#define I3C_SSTATUS_RX_PEND_MASK BIT(11) > +#define I3C_SSTATUS_TXNOTFULL_MASK BIT(12) > +#define I3C_SSTATUS_DACHG_MASK BIT(13) > +#define I3C_SSTATUS_EVDET_MASK GENMASK(21, 20) > +#define I3C_SSTATUS_EVDET_ACKED 0x3 > +#define I3C_SSTATUS_IBIDIS_MASK BIT(24) > +#define I3C_SSTATUS_HJDIS_MASK BIT(27) > + There is couple of space formatting here that requires to be fixed. Cheers, Joshua