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[213.149.36.248]) by smtp.gmail.com with ESMTPSA id j15-20020a1709062a0f00b00a45a96a9c37sm2093773eje.65.2024.03.06.12.38.34 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 06 Mar 2024 12:38:35 -0800 (PST) Message-ID: <0b032929-f525-4b2e-a176-1a447cf0fa7f@gmail.com> Date: Wed, 6 Mar 2024 21:38:33 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/4] arm64: dts: qcom: ipq6018: add 1.2GHz CPU Frequency To: Chukun Pan , Bjorn Andersson Cc: Konrad Dybcio , Krzysztof Kozlowski , Conor Dooley , Rob Herring , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org References: <20240306140306.876188-1-amadeus@jmu.edu.cn> <20240306140306.876188-2-amadeus@jmu.edu.cn> Content-Language: en-US From: Robert Marko In-Reply-To: <20240306140306.876188-2-amadeus@jmu.edu.cn> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 06. 03. 2024. 15:03, Chukun Pan wrote: > Some IPQ6000 SoCs have CPU frequencies up to 1.2GHz, > so add this frequency. > > Signed-off-by: Chukun Pan > --- > arch/arm64/boot/dts/qcom/ipq6018.dtsi | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi > index 4e29adea570a..7fdb119083a2 100644 > --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi > +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi > @@ -119,6 +119,13 @@ opp-1056000000 { > clock-latency-ns = <200000>; > }; > > + opp-1200000000 { > + opp-hz = /bits/ 64 <1200000000>; > + opp-microvolt = <850000>; Can I ask the source of this voltage level? Because, its not present in the downstream QCA tree at all. Regards, Robert > + opp-supported-hw = <0x4>; > + clock-latency-ns = <200000>; > + }; > + > opp-1320000000 { > opp-hz = /bits/ 64 <1320000000>; > opp-microvolt = <862500>;