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Thu, 7 Mar 2024 00:50:03 -0700 Received: from wendy (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35 via Frontend Transport; Thu, 7 Mar 2024 00:50:01 -0700 Date: Thu, 7 Mar 2024 07:49:17 +0000 From: Conor Dooley To: Charlie Jenkins CC: Paul Walmsley , Palmer Dabbelt , Albert Ou , Jisheng Zhang , Evan Green , =?iso-8859-1?Q?Cl=E9ment_L=E9ger?= , Eric Biggers , Elliot Berman , Charles Lohr , , Subject: Re: [PATCH v7 1/4] riscv: lib: Introduce has_fast_unaligned_access function Message-ID: <20240307-coronary-snagged-cf3409df8f7a@wendy> References: <20240306-disable_misaligned_probe_config-v7-0-6c90419e7a96@rivosinc.com> <20240306-disable_misaligned_probe_config-v7-1-6c90419e7a96@rivosinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="sY3+K8PtRfDhOk5h" Content-Disposition: inline In-Reply-To: <20240306-disable_misaligned_probe_config-v7-1-6c90419e7a96@rivosinc.com> --sY3+K8PtRfDhOk5h Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Mar 06, 2024 at 12:00:01PM -0800, Charlie Jenkins wrote: $subject: riscv: lib: Introduce has_fast_unaligned_access function nit - s/ function/()/ & put the () after function names in commit messages please. > Create has_fast_unaligned_access to avoid needing to explicitly check > the fast_misaligned_access_speed_key static key. >=20 > Signed-off-by: Charlie Jenkins > Reviewed-by: Evan Green Reviewed-by: Conor Dooley Cheers, Conor. > --- > arch/riscv/include/asm/cpufeature.h | 11 ++++++++--- > arch/riscv/kernel/cpufeature.c | 6 +++--- > arch/riscv/lib/csum.c | 7 ++----- > 3 files changed, 13 insertions(+), 11 deletions(-) >=20 > diff --git a/arch/riscv/include/asm/cpufeature.h b/arch/riscv/include/asm= /cpufeature.h > index 5a626ed2c47a..466e1f591919 100644 > --- a/arch/riscv/include/asm/cpufeature.h > +++ b/arch/riscv/include/asm/cpufeature.h > @@ -1,6 +1,6 @@ > /* SPDX-License-Identifier: GPL-2.0-only */ > /* > - * Copyright 2022-2023 Rivos, Inc > + * Copyright 2022-2024 Rivos, Inc > */ > =20 > #ifndef _ASM_CPUFEATURE_H > @@ -53,6 +53,13 @@ static inline bool check_unaligned_access_emulated(int= cpu) > static inline void unaligned_emulation_finish(void) {} > #endif > =20 > +DECLARE_STATIC_KEY_FALSE(fast_unaligned_access_speed_key); > + > +static __always_inline bool has_fast_unaligned_accesses(void) > +{ > + return static_branch_likely(&fast_unaligned_access_speed_key); > +} > + > unsigned long riscv_get_elf_hwcap(void); > =20 > struct riscv_isa_ext_data { > @@ -135,6 +142,4 @@ static __always_inline bool riscv_cpu_has_extension_u= nlikely(int cpu, const unsi > return __riscv_isa_extension_available(hart_isa[cpu].isa, ext); > } > =20 > -DECLARE_STATIC_KEY_FALSE(fast_misaligned_access_speed_key); > - > #endif > diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeatur= e.c > index 89920f84d0a3..7878cddccc0d 100644 > --- a/arch/riscv/kernel/cpufeature.c > +++ b/arch/riscv/kernel/cpufeature.c > @@ -810,14 +810,14 @@ static void check_unaligned_access_nonboot_cpu(void= *param) > check_unaligned_access(pages[cpu]); > } > =20 > -DEFINE_STATIC_KEY_FALSE(fast_misaligned_access_speed_key); > +DEFINE_STATIC_KEY_FALSE(fast_unaligned_access_speed_key); > =20 > static void modify_unaligned_access_branches(cpumask_t *mask, int weight) > { > if (cpumask_weight(mask) =3D=3D weight) > - static_branch_enable_cpuslocked(&fast_misaligned_access_speed_key); > + static_branch_enable_cpuslocked(&fast_unaligned_access_speed_key); > else > - static_branch_disable_cpuslocked(&fast_misaligned_access_speed_key); > + static_branch_disable_cpuslocked(&fast_unaligned_access_speed_key); > } > =20 > static void set_unaligned_access_static_branches_except_cpu(int cpu) > diff --git a/arch/riscv/lib/csum.c b/arch/riscv/lib/csum.c > index af3df5274ccb..7178e0acfa22 100644 > --- a/arch/riscv/lib/csum.c > +++ b/arch/riscv/lib/csum.c > @@ -3,7 +3,7 @@ > * Checksum library > * > * Influenced by arch/arm64/lib/csum.c > - * Copyright (C) 2023 Rivos Inc. > + * Copyright (C) 2023-2024 Rivos Inc. > */ > #include > #include > @@ -318,10 +318,7 @@ unsigned int do_csum(const unsigned char *buff, int = len) > * branches. The largest chunk of overlap was delegated into the > * do_csum_common function. > */ > - if (static_branch_likely(&fast_misaligned_access_speed_key)) > - return do_csum_no_alignment(buff, len); > - > - if (((unsigned long)buff & OFFSET_MASK) =3D=3D 0) > + if (has_fast_unaligned_accesses() || (((unsigned long)buff & OFFSET_MAS= K) =3D=3D 0)) > return do_csum_no_alignment(buff, len); > =20 > return do_csum_with_alignment(buff, len); >=20 > --=20 > 2.43.2 >=20 --sY3+K8PtRfDhOk5h Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZelxZAAKCRB4tDGHoIJi 0hJKAQC2W/fGv9uhQGFJKKVUxs4qVTbkPKTSpM7O//BztxDsbQEAvy0LTEPXat2c sWGUnjelciGQEV/dSAdDnYTNHFkXsws= =wVOO -----END PGP SIGNATURE----- --sY3+K8PtRfDhOk5h--