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Message-ID: <3acffe042bde796dc47d4bdcb339f0081a05193c.camel@linaro.org>
Subject: Re: [PATCH] arm64: dts: exynos: gs101: move serial_0
 pinctrl-0/names to dtsi
From: =?ISO-8859-1?Q?Andr=E9?= Draszik <andre.draszik@linaro.org>
To: Tudor Ambarus <tudor.ambarus@linaro.org>, peter.griffin@linaro.org, 
	robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org
Cc: alim.akhtar@samsung.com, linux-arm-kernel@lists.infradead.org, 
 linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, 
 linux-kernel@vger.kernel.org, willmcvicker@google.com,
 kernel-team@android.com
Date: Thu, 07 Mar 2024 14:00:51 +0000
In-Reply-To: <20240307135248.162752-1-tudor.ambarus@linaro.org>
References: <20240307135248.162752-1-tudor.ambarus@linaro.org>
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On Thu, 2024-03-07 at 13:52 +0000, Tudor Ambarus wrote:
> The pinctrl nodes are coming from the shared gs101-pinctrl.dtsi,
> thus the pinctrl-0/names shall stay in dtsi. Move them.
>=20
> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
> ---
> =C2=A0arch/arm64/boot/dts/exynos/google/gs101-oriole.dts | 2 --
> =C2=A0arch/arm64/boot/dts/exynos/google/gs101.dtsi=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0 | 2 ++
> =C2=A02 files changed, 2 insertions(+), 2 deletions(-)
>=20
> diff --git a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts b/arch/ar=
m64/boot/dts/exynos/google/gs101-oriole.dts
> index 6ccade2c8cb4..9dc0f47ef646 100644
> --- a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts
> +++ b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts
> @@ -103,8 +103,6 @@ key_power: key-power-pins {
> =C2=A0};
> =C2=A0
> =C2=A0&serial_0 {
> -	pinctrl-names =3D "default";
> -	pinctrl-0 =3D <&uart0_bus>;
> =C2=A0	status =3D "okay";
> =C2=A0};
> =C2=A0
> diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/bo=
ot/dts/exynos/google/gs101.dtsi
> index 55e6bcb3689e..ee65ed9d2cfc 100644
> --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> @@ -421,6 +421,8 @@ serial_0: serial@10a00000 {
> =C2=A0				reg =3D <0x10a00000 0xc0>;
> =C2=A0				interrupts =3D <GIC_SPI 634
> =C2=A0					=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 IRQ_TYPE_LEVEL_HIGH 0>;
> +				pinctrl-names =3D "default";
> +				pinctrl-0 =3D <&uart0_bus>;

The preferred order for these is pinctrl-0 pinctrl-names (and I thought
I had sent a patch for all such issues in gs101, but looks like I
didn't...)

Once addressed:

Reviewed-by: Andr=C3=A9 Draszik <andre.draszik@linaro.org>

Cheers,
Andre'