Received: by 2002:ab2:3319:0:b0:1ef:7a0f:c32d with SMTP id i25csp522725lqc; Fri, 8 Mar 2024 04:52:55 -0800 (PST) X-Forwarded-Encrypted: i=3; AJvYcCWA8calef6hFNq7eHrm+1BMvZQ/8N45H1Z40fcwBucuPsJvApBbcOJ4f3Pum8Deez/njoeL8GmWIkEDn20SLRaeB7/Q4k/2uW3dVEDaPQ== X-Google-Smtp-Source: AGHT+IGYU5V+LtV7GIjPXBSOo1kXiNHkoRH+fH8IXfeP3qnKoOC0nqYFeVMjy+bLzoAYfC/JlNUB X-Received: by 2002:a05:6808:2382:b0:3c2:b96:e9e8 with SMTP id bp2-20020a056808238200b003c20b96e9e8mr13844067oib.18.1709902374995; Fri, 08 Mar 2024 04:52:54 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1709902374; cv=pass; d=google.com; s=arc-20160816; b=B7Yu/MoLguyVZlZtIcJYs8LtUmE0jt4R/saMz8e+o3MJekTSNvcgiMk9tNtWNJy67S oaBW8WJAo2g7NdQRuBMm7z6rVEq1Fc5D+n7e0W865nsQE47Z8tXB1QfvY4qHyeCrhYB6 POENmFUMiooeI9X8Bfljy3MZps/otEMU1eEhjLvZQ5+ey/Ie2aQurJHkJHAPCwTmP0ng KyGwMQ9bqqtKNeguIvpXEBldAyYR+9QrcK7N2LETfoRQ1dWOoxttKAV6pMT1pRvI+0wc AiqPUO56Chskuzef5OcfMdi2Hsv0d75w1n7ChHT6a5XggyrB4zW6QGMUBBPCOCFwSXvh PKbg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=cc:to:content-transfer-encoding:mime-version:list-unsubscribe :list-subscribe:list-id:precedence:message-id:date:subject:from; bh=3KJAG2qO/hsXvsFjpopcxPsVWcf8N5FEKWJv+QU/vLA=; fh=rTsj5RmERjj27sEgozrxw9HFgE0Arx8Z0LoJK8x5SA8=; b=HgacZsRO2h1KY9bXB4HNJM3PbArB8wFi04ZYrDH9+3PfKeUTM/yRFMydsSPzm6W2l/ DCge9sqnGU2NjktEH+9xYv0zTGswvEraKEd+u/63cLEzUswl7dfZzEfbsegohjg4GLnI eXc0eKkieSxkNdBxscXXfXKjcVqnd/kVCmBES+jXERcu0Yax20YEEGEvdE5XRsIhpcoO 2FqmQlQU2/O/eFCf6zYMJsxmUuGRJBPiCJWEzb0n8RvyIhiMdryu6yZ2AE64kvvH3x2h 2aERPqXlhSIabO1gKrq3mLbBtYuKiVWNZXgaSS1gAymt5O2SEkNOlSOb1yP7WXR7VbBw KH/g==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; arc=pass (i=1 spf=pass spfdomain=0leil.net); spf=pass (google.com: domain of linux-kernel+bounces-97028-linux.lists.archive=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-97028-linux.lists.archive=gmail.com@vger.kernel.org" Return-Path: Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. [139.178.88.99]) by mx.google.com with ESMTPS id z9-20020a63e549000000b005dc4ec48cb5si15889889pgj.641.2024.03.08.04.52.54 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Mar 2024 04:52:54 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-97028-linux.lists.archive=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) client-ip=139.178.88.99; Authentication-Results: mx.google.com; arc=pass (i=1 spf=pass spfdomain=0leil.net); spf=pass (google.com: domain of linux-kernel+bounces-97028-linux.lists.archive=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-97028-linux.lists.archive=gmail.com@vger.kernel.org" Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id AC6E228379D for ; Fri, 8 Mar 2024 12:52:43 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 64CC41F606; Fri, 8 Mar 2024 12:52:27 +0000 (UTC) Received: from smtp-bc0e.mail.infomaniak.ch (smtp-bc0e.mail.infomaniak.ch [45.157.188.14]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8EF321429E for ; Fri, 8 Mar 2024 12:52:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.157.188.14 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709902346; cv=none; b=hMz81ajxhy2HOSPimwhUtmjH7TKljGyoMw+kjOLiCRZckJ/8vPJivzJOgxMIh2zM5XQVoBa9IPUHiebw7+YqC029gam4ukGjOLTn8pdokEiu0zi0ZJZj7u0RY/ccEkBDoFMac8BPeqzLrAs/Z6thMbwa/ueLi/jlHCD79wCSCyI= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709902346; c=relaxed/simple; bh=XlOhwNLXVrKct8OH/oxJVQEEYWtbUzLjg60WCqrTM6k=; h=From:Subject:Date:Message-Id:MIME-Version:Content-Type:To:Cc; b=g5UriBdbbaWg8ZZqURCbsJetJtkw0B+Xf14YDkY37ybttMsQ1BvAx7G029ML4LIqILk+tD5AKUHaCFB+HS7xnwK5yMKka/RouZgwGzLm4SdQaSF9Gq8xyn1Rb3L/BY33+2aK7zqi7beYnGMVPs8yHWcPJndU8vqei0LmxuPZUF0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=0leil.net; spf=pass smtp.mailfrom=0leil.net; arc=none smtp.client-ip=45.157.188.14 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=0leil.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=0leil.net Received: from smtp-3-0001.mail.infomaniak.ch (unknown [10.4.36.108]) by smtp-3-3000.mail.infomaniak.ch (Postfix) with ESMTPS id 4TrmKC4vd3zMqB2L; Fri, 8 Mar 2024 13:52:15 +0100 (CET) Received: from unknown by smtp-3-0001.mail.infomaniak.ch (Postfix) with ESMTPA id 4TrmKB62vyzMpnPl; Fri, 8 Mar 2024 13:52:14 +0100 (CET) From: Quentin Schulz Subject: [PATCH 0/3] rockchip: small DTS fixes for RK3399 Puma Date: Fri, 08 Mar 2024 13:52:07 +0100 Message-Id: <20240308-puma-diode-pu-v1-0-2b38457bcdc0@theobroma-systems.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAPcJ62UC/x2MQQqAIBAAvxJ7TlDTiL4SHaxdaw9ZKEUg/j3pN nOYyZAoMiUYmwyRHk58hiqqbWDdXdhIMFYHLbWRnRzEdR9OIJ9IFYVC7Y21aqEeoTZXJM/v/5v mUj5PnP/3XwAAAA== To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: Klaus Goger , Quentin Schulz , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Quentin Schulz X-Mailer: b4 0.13.0 X-Infomaniak-Routing: alpha There's a pull-up missing on a pin that is used as GPIO input for PCIe which will make the diode/level-shifter not let voltage pass and thus not allowing the state of the pin to change. Also add the missing regulators for the PCIe PHY+connector though this is purely cosmetic. There's also a missing PU on the USB ID pin used as a GPIO input, so let's add it for the same reasons as the one used for PCIe listed above. Note there's a light dependency on https://lore.kernel.org/linux-rockchip/43d84aa9-ce0f-406e-82ac-2a691264ee23@theobroma-systems.com/T/#ma0499cbc5e5c20f1a4c6b8452baa2d296abe2d0d to prevent a git conflict for the maintainer(s). Signed-off-by: Quentin Schulz --- Quentin Schulz (3): arm64: dts: rockchip: enable internal pull-up on Q7_USB_ID for RK3399 Puma arm64: dts: rockchip: enable internal pull-up on PCIE_WAKE# for RK3399 Puma arm64: dts: rockchip: add regulators for PCIe on RK3399 Puma Haikou .../arm64/boot/dts/rockchip/rk3399-puma-haikou.dts | 2 ++ arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi | 33 +++++++++++++++++++++- 2 files changed, 34 insertions(+), 1 deletion(-) --- base-commit: 370e52abbf8306f09b0022995ad7ccdff3a834bb change-id: 20240308-puma-diode-pu-1d2f4551be6d Best regards, -- Quentin Schulz