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AJvYcCW8x9kwWKzehNH3cr8I96czmNjDw3EIJ4PH6c3tGyjmm9iZUMKDWUS8gGq9wD6T3wo/ijnEAM6y570vRtPywgHu7z12nriRBlr5Nb2h X-Gm-Message-State: AOJu0YxRUxAOaUFkNM+sL+frL750MM9m4vGVquBP+zvfSzjrKvAMl2ql nm7FZaQv+Zn09hnS2glrKhus5CGBraCUvEotn0Vf0o1OGch5+5NsOpz+9b1YlWiZ8IbzrRT9Jx2 P X-Received: by 2002:a05:600c:45c6:b0:413:2c11:f795 with SMTP id s6-20020a05600c45c600b004132c11f795mr115920wmo.39.1710117208283; Sun, 10 Mar 2024 17:33:28 -0700 (PDT) Received: from [127.0.0.1] ([176.61.106.68]) by smtp.gmail.com with ESMTPSA id m38-20020a05600c3b2600b00412b6fbb9b5sm13881720wms.8.2024.03.10.17.33.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 10 Mar 2024 17:33:27 -0700 (PDT) From: Bryan O'Donoghue Date: Mon, 11 Mar 2024 00:33:25 +0000 Subject: [PATCH 1/2] dt-bindings: clock: qcom: Fix x1e80100 camcc power-domain declaration Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20240311-linux-next-camcc-fixes-v1-1-d126ae0b9350@linaro.org> References: <20240311-linux-next-camcc-fixes-v1-0-d126ae0b9350@linaro.org> In-Reply-To: <20240311-linux-next-camcc-fixes-v1-0-d126ae0b9350@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vladimir Zapolskiy , Abel Vesa , Rajendra Nayak Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Bryan O'Donoghue X-Mailer: b4 0.13-dev-26615 camcc on x1e80100 requires two power domains MXC and MMCX. Define those as part of the schema. Fixes: 76126a5129b5 ("clk: qcom: Add camcc clock driver for x1e80100") Signed-off-by: Bryan O'Donoghue --- .../bindings/clock/qcom,sm8450-camcc.yaml | 37 ++++++++++++++++++---- 1 file changed, 31 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml index fa0e5b6b02b81..eae9b73ae1f16 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml @@ -19,9 +19,6 @@ description: | include/dt-bindings/clock/qcom,sc8280xp-camcc.h include/dt-bindings/clock/qcom,x1e80100-camcc.h -allOf: - - $ref: qcom,gcc.yaml# - properties: compatible: enum: @@ -38,9 +35,8 @@ properties: - description: Sleep clock source power-domains: - maxItems: 1 - description: - A phandle and PM domain specifier for the MMCX power domain. + minItems: 1 + maxItems: 2 required-opps: maxItems: 1 @@ -56,6 +52,35 @@ required: - power-domains - required-opps +allOf: + - $ref: qcom,gcc.yaml# + - if: + properties: + compatible: + contains: + enum: + - qcom,sc8280xp-camcc + - qcom,sm8450-camcc + - qcom,sm8550-camcc + then: + properties: + power-domains: + description: + A phandle and PM domain specifier for the MMCX power domain. + + - if: + properties: + compatible: + contains: + enum: + - qcom,x1e80100-camcc + then: + properties: + power-domains: + items: + - description: A phandle and PM domain specifier for the MXC power domain. + - description: A phandle and PM domain specifier for the MMCX power domain. + unevaluatedProperties: false examples: -- 2.43.1