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From: Yeo Reum Yun <YeoReum.Yun@arm.com>
To: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
CC: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"stable@vger.kernel.org" <stable@vger.kernel.org>, Catalin Marinas
	<Catalin.Marinas@arm.com>, Mark Rutland <Mark.Rutland@arm.com>, Will Deacon
	<will@kernel.org>, Peter Zijlstra <peterz@infradead.org>, Aaron Lu
	<aaron.lu@intel.com>
Subject: Re: [RFC PATCH] sched: Add missing memory barrier in switch_mm_cid
Thread-Topic: [RFC PATCH] sched: Add missing memory barrier in switch_mm_cid
Thread-Index: AQHab9qBv07DN8ioIEGwFWG/l1dpWLEyNKPT
Date: Mon, 11 Mar 2024 08:45:07 +0000
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Hi. Mathieu. Sorry to late answer.

> diff --git a/arch/x86/include/asm/barrier.h b/arch/x86/include/asm/barrie=
r.h
> index 35389b2af88e..0d5e54201eb2 100644
> --- a/arch/x86/include/asm/barrier.h
> +++ b/arch/x86/include/asm/barrier.h
> @@ -79,6 +79,9 @@ do {                                                   =
               \
>  #define __smp_mb__before_atomic()      do { } while (0)
>  #define __smp_mb__after_atomic()       do { } while (0)

> +/* Writing to CR3 provides a full memory barrier in switch_mm(). */
> +#define smp_mb__after_switch_mm()      do { } while (0)
> +
> #include <asm-generic/barrier.h>

IIUC, ppc already does smp_mb() in switch_mm.

Would it better to add the same macro which do nothing to pcc?\\

Thanks!

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