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[209.85.219.175]) by smtp.gmail.com with ESMTPSA id o137-20020a0dcc8f000000b0060a0c161e03sm1227311ywd.59.2024.03.11.02.00.36 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 11 Mar 2024 02:00:36 -0700 (PDT) Received: by mail-yb1-f175.google.com with SMTP id 3f1490d57ef6-dcd7c526cc0so3873289276.1; Mon, 11 Mar 2024 02:00:36 -0700 (PDT) X-Forwarded-Encrypted: i=1; AJvYcCVPcBmX+CekcK02HcUPgCcCzS00gpS47V4P1VGGxFY5ZlCE2hFBcgpwtlnhewVg2qnQdmFfcqYXsOfCOs20g7fNU+hcZHNMSHG0BlE0pGX9COrCTr9p77o+tTFs6YwvFMB4xj05jjUWVNmeaYr6IdzTXYlclTn1Wv5qVuZLfX5DRXCy2vrbbZQ2Og86YEM/nRWNtktw3T7nToqiTwXL0oa5jxqRFLdZ X-Received: by 2002:a25:e095:0:b0:dc6:d808:cf75 with SMTP id x143-20020a25e095000000b00dc6d808cf75mr3988125ybg.20.1710147636388; Mon, 11 Mar 2024 02:00:36 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240308172726.225357-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20240308172726.225357-3-prabhakar.mahadev-lad.rj@bp.renesas.com> <7082ed3b-d6d0-4228-b7a6-7c0e0e46b8e2@linaro.org> <2974085a-d9b4-4a66-b60f-c02a06a74647@linaro.org> In-Reply-To: <2974085a-d9b4-4a66-b60f-c02a06a74647@linaro.org> From: Geert Uytterhoeven Date: Mon, 11 Mar 2024 10:00:23 +0100 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 2/5] dt-bindings: i2c: renesas,riic: Document R9A09G057 support To: Krzysztof Kozlowski Cc: "Lad, Prabhakar" , Chris Brandt , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm , Wolfram Sang , linux-renesas-soc@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Fabrizio Castro , Lad Prabhakar Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Krzysztof, On Sun, Mar 10, 2024 at 9:10=E2=80=AFAM Krzysztof Kozlowski wrote: > On 10/03/2024 00:28, Lad, Prabhakar wrote: > > On Sat, Mar 9, 2024 at 12:00=E2=80=AFPM Krzysztof Kozlowski > > wrote: > >> On 08/03/2024 18:27, Prabhakar wrote: > >>> From: Lad Prabhakar > >>> > >>> Document support for the I2C Bus Interface (RIIC) available in the > >>> Renesas RZ/V2H (R9A09G057) SoC. > >>> > >>> The RIIC interface in the Renesas RZ/V2H differs from RZ/A in a > >>> couple of ways: > >>> - Register offsets for the RZ/V2H SoC differ from those of the RZ/A S= oC. > >>> - RZ/V2H register access is 8-bit, whereas RZ/A supports 8/16/32-bit. > >>> - RZ/V2H has some bit differences in the slave address register. > >>> > >>> To accommodate these differences in the existing driver, a new compat= ible > >>> string "renesas,riic-r9a09g057" is added. > >>> > >>> Signed-off-by: Lad Prabhakar > >>> Reviewed-by: Fabrizio Castro > >>> --- a/Documentation/devicetree/bindings/i2c/renesas,riic.yaml > >>> +++ b/Documentation/devicetree/bindings/i2c/renesas,riic.yaml > >>> @@ -15,14 +15,19 @@ allOf: > >>> > >>> properties: > >>> compatible: > >>> - items: > >>> - - enum: > >>> - - renesas,riic-r7s72100 # RZ/A1H > >>> - - renesas,riic-r7s9210 # RZ/A2M > >>> - - renesas,riic-r9a07g043 # RZ/G2UL and RZ/Five > >>> - - renesas,riic-r9a07g044 # RZ/G2{L,LC} > >>> - - renesas,riic-r9a07g054 # RZ/V2L > >>> - - const: renesas,riic-rz # generic RIIC compatible > >>> + oneOf: > >>> + - items: > >>> + - enum: > >>> + - renesas,riic-r7s72100 # RZ/A1H > >>> + - renesas,riic-r7s9210 # RZ/A2M > >>> + - renesas,riic-r9a07g043 # RZ/G2UL and RZ/Five > >>> + - renesas,riic-r9a07g044 # RZ/G2{L,LC} > >>> + - renesas,riic-r9a07g054 # RZ/V2L > >>> + - const: renesas,riic-rz # generic RIIC compatible > >>> + > >>> + - items: > >>> + - enum: > >>> + - renesas,riic-r9a09g057 # RZ/V2H(P) > >> > >> No, that does not look right. If you added generic compatible for all > >> RIIC then how can you add a new RIIC compatible which does not follow > >> generic one? > >> > > The generic compatible above which was added previously was for the > > RZ/(A) SoCs and not for all the RIICs. The RZ/G2L family was also > > No, it said: "generic RIIC compatible". It did not say "RIIC RZ/A". It > said RIIC RZ At the time the original bindings were written, only RZ/A1, RZ/T1, and RZ/N1 existed, and all RIIC modules present in these SoCs were identical. Later, we got RZ/A2, which also included a compatible RIIC block. Somewhere along the timeline, the marketing department became creative, and we got RZ/G1 (RZ/G1[HMNEC]) and RZ/G2 (RZ/G2[HMNE]), which were unrelated to earlier RZ series :-( When marketing started smoking something different, we got RZ/G2L, which is unrelated to RZ/G2, but reuses some parts from RZ/A. Recently, we got RZ/G3S, which is similar to RZ/G2L... > > compatible hence they fallback to the generic RZ one. > > riic-r9a09g057 is also RIIC RZ, isn't it? Yes, as in "it comes from the division that calls its products RZ/something". But... > >> This shows the ridiculousness of these generic compatibles. They are > >> generic till you figure out the truth: oh crap, it's not generic. > >> > > Sorry I lack skills to predict the future of upcoming IP blocks which > > fit in the SoC. > > So don't use generic compatibles as fallbacks. That's the point. It's indeed difficult to predict the future. So SoC-specific compatible values are safer. At the same time, we want to avoid having to add compatible values for each and every SoC to each driver, so we try to group SoCs per family. For R-Car that worked out reasonably well, however, for RZ... Gr{oetje,eeting}s, Geert --=20 Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k= org In personal conversations with technical people, I call myself a hacker. Bu= t when I'm talking to journalists I just say "programmer" or something like t= hat. -- Linus Torvalds