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Mon, 11 Mar 2024 15:22:29 GMT Received: from [10.50.58.231] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Mon, 11 Mar 2024 08:22:25 -0700 Message-ID: <8e9601b1-836e-4aaf-b5ef-2f1cf70a00b9@quicinc.com> Date: Mon, 11 Mar 2024 20:52:21 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/2] clk: qcom: camcc-x1e80100: Set titan_top_gdsc as the parent GDSC of subordinate GDSCs To: Bryan O'Donoghue , Bjorn Andersson , Konrad Dybcio , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vladimir Zapolskiy , Abel Vesa CC: , , , References: <20240311-linux-next-camcc-fixes-v1-0-d126ae0b9350@linaro.org> <20240311-linux-next-camcc-fixes-v1-2-d126ae0b9350@linaro.org> Content-Language: en-US From: Rajendra Nayak In-Reply-To: <20240311-linux-next-camcc-fixes-v1-2-d126ae0b9350@linaro.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: l0KJQKAR3t0RJglP2F6sINkSJ-gNw2Rv X-Proofpoint-ORIG-GUID: l0KJQKAR3t0RJglP2F6sINkSJ-gNw2Rv X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-03-11_10,2024-03-06_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 malwarescore=0 clxscore=1011 mlxlogscore=999 bulkscore=0 lowpriorityscore=0 impostorscore=0 mlxscore=0 spamscore=0 priorityscore=1501 adultscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2402120000 definitions=main-2403110116 On 3/11/2024 6:03 AM, Bryan O'Donoghue wrote: > The Titan TOP GDSC is the parent GDSC for all other GDSCs in the CAMCC > block. None of the subordinate blocks will switch on without the parent > GDSC switched on. > > Fixes: 76126a5129b5 ("clk: qcom: Add camcc clock driver for x1e80100") > Signed-off-by: Bryan O'Donoghue Acked-by: Rajendra Nayak > --- > drivers/clk/qcom/camcc-x1e80100.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/clk/qcom/camcc-x1e80100.c b/drivers/clk/qcom/camcc-x1e80100.c > index 46bb225906bff..d421da57697a2 100644 > --- a/drivers/clk/qcom/camcc-x1e80100.c > +++ b/drivers/clk/qcom/camcc-x1e80100.c > @@ -2212,6 +2212,8 @@ static struct clk_branch cam_cc_sfe_0_fast_ahb_clk = { > }, > }; > > +static struct gdsc cam_cc_titan_top_gdsc; > + > static struct gdsc cam_cc_bps_gdsc = { > .gdscr = 0x10004, > .en_rest_wait_val = 0x2, > @@ -2221,6 +2223,7 @@ static struct gdsc cam_cc_bps_gdsc = { > .name = "cam_cc_bps_gdsc", > }, > .pwrsts = PWRSTS_OFF_ON, > + .parent = &cam_cc_titan_top_gdsc.pd, > .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE, > }; > > @@ -2233,6 +2236,7 @@ static struct gdsc cam_cc_ife_0_gdsc = { > .name = "cam_cc_ife_0_gdsc", > }, > .pwrsts = PWRSTS_OFF_ON, > + .parent = &cam_cc_titan_top_gdsc.pd, > .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE, > }; > > @@ -2245,6 +2249,7 @@ static struct gdsc cam_cc_ife_1_gdsc = { > .name = "cam_cc_ife_1_gdsc", > }, > .pwrsts = PWRSTS_OFF_ON, > + .parent = &cam_cc_titan_top_gdsc.pd, > .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE, > }; > > @@ -2257,6 +2262,7 @@ static struct gdsc cam_cc_ipe_0_gdsc = { > .name = "cam_cc_ipe_0_gdsc", > }, > .pwrsts = PWRSTS_OFF_ON, > + .parent = &cam_cc_titan_top_gdsc.pd, > .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE, > }; > > @@ -2269,6 +2275,7 @@ static struct gdsc cam_cc_sfe_0_gdsc = { > .name = "cam_cc_sfe_0_gdsc", > }, > .pwrsts = PWRSTS_OFF_ON, > + .parent = &cam_cc_titan_top_gdsc.pd, > .flags = POLL_CFG_GDSCR | RETAIN_FF_ENABLE, > }; > >