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From: Radha Chintakuntla <radhac@marvell.com>
To: Simon Horman <horms@kernel.org>
CC: "davem@davemloft.net" <davem@davemloft.net>,
        "edumazet@google.com"
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	<gakula@marvell.com>,
        Hariprasad Kelam <hkelam@marvell.com>,
        Jerin Jacob
	<jerinj@marvell.com>,
        Subbaraya Sundeep Bhatta <sbhatta@marvell.com>
Subject: RE: [EXTERNAL] Re: [PATCH] octeontx2-af: Increase maximum BPID
 channels
Thread-Topic: [EXTERNAL] Re: [PATCH] octeontx2-af: Increase maximum BPID
 channels
Thread-Index: AQHacA6fu8tIXN9KB02ERLGkSamCvLEsXdYAgAH0bHA=
Date: Mon, 11 Mar 2024 19:23:07 +0000
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> -----Original Message-----
> From: Simon Horman <horms@kernel.org>
> Sent: Thursday, March 7, 2024 6:52 AM
> To: Radha Chintakuntla <radhac@marvell.com>
> Cc: davem@davemloft.net; edumazet@google.com; kuba@kernel.org;
> pabeni@redhat.com; netdev@vger.kernel.org; linux-kernel@vger.kernel.org;
> Sunil Kovvuri Goutham <sgoutham@marvell.com>; Linu Cherian
> <lcherian@marvell.com>; Geethasowjanya Akula <gakula@marvell.com>;
> Hariprasad Kelam <hkelam@marvell.com>; Jerin Jacob <jerinj@marvell.com>;
> Subbaraya Sundeep Bhatta <sbhatta@marvell.com>
> Subject: [EXTERNAL] Re: [PATCH] octeontx2-af: Increase maximum BPID
> channels
>=20
> Prioritize security for external emails: Confirm sender and content safet=
y
> before clicking links or opening attachments
>=20
> ----------------------------------------------------------------------
> On Wed, Mar 06, 2024 at 01:38:06PM -0800, Radha Mohan Chintakuntla
> wrote:
> > Any NIX interface type can have maximum 256 channels. So increased the
> > backpressure ID count to 256 so that it can cover cn9k and cn10k SoCs
> > that have different NIX interface types with varied maximum channels.
> >
> > Signed-off-by: Radha Mohan Chintakuntla <radhac@marvell.com>
> > ---
> >  drivers/net/ethernet/marvell/octeontx2/af/mbox.h | 6 ++----
> >  1 file changed, 2 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
> > b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
> > index d5c4f810da61..223a2e39172c 100644
> > --- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
> > +++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
> > @@ -1207,10 +1207,8 @@ struct nix_bp_cfg_req {
> >  	/* bpid_per_chan =3D 1 assigns separate bp id for each channel */  };
> >
> > -/* PF can be mapped to either CGX or LBK interface,
> > - * so maximum 64 channels are possible.
> > - */
> > -#define NIX_MAX_BPID_CHAN	64
> > +/* Maximum channels any single NIX interface can have */
> > +#define NIX_MAX_BPID_CHAN	256
> >  struct nix_bp_cfg_rsp {
> >  	struct mbox_msghdr hdr;
> >  	u16	chan_bpid[NIX_MAX_BPID_CHAN]; /* Channel and bpid
> mapping */
>=20
> Hi Radha,
>=20
> looking over this, I am curious to know how out-of bounds access to
> chan_bpid is prevented. The bounds seems to be the the number of PF or VF
> rings. Which I assume is derived from the HW. But if so, what if the HW r=
eports
> more than NIX_MAX_BPID_CHAN rings?
>
> On a different note, struct includes the following field:
>=20
> 	u16 bpid[NIX_MAX_BPID_CHAN];
>=20
> But here the index used seems to be
>=20
> 1. VLAN priority (which has maximum value of 8) if DCB is used 2. 0 other=
wise
>=20
> So perhaps fewer elements are needed?
>=20
> Apologies in advance if I'm on the wrong track here.
Hi Simon,

Any interface(or MAC) of NIX doesn't have more than 256 on any of current o=
r upcoming chips by design.
Each of the channels can be mapped to a different BPID.
As you mentioned, if for a given interface there are 8 VLAN priorities then=
 we need only 8 BPIDs to configure proper backpressure settings.
This entry 'chan_bpid' gives information on which BPID should be configured=
 for each of the 256 channels.
Hope this clarifies.

Regards,
Radha