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Date: Mon, 11 Mar 2024 13:41:44 -0700
From: Jakub Kicinski <kuba@kernel.org>
To: Piotr Wejman <piotrwejman90@gmail.com>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>, Jose Abreu
 <joabreu@synopsys.com>, "David S. Miller" <davem@davemloft.net>, Eric
 Dumazet <edumazet@google.com>, Paolo Abeni <pabeni@redhat.com>, Maxime
 Coquelin <mcoquelin.stm32@gmail.com>, netdev@vger.kernel.org,
 linux-stm32@st-md-mailman.stormreply.com,
 linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3] net: stmmac: fix rx queue priority assignment
Message-ID: <20240311134144.7b1e1a34@kernel.org>
In-Reply-To: <20240303190339.52496-1-piotrwejman90@gmail.com>
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On Sun,  3 Mar 2024 20:03:38 +0100 Piotr Wejman wrote:
> The driver should ensure that same priority is not mapped to multiple
> rx queues. Currently rx_queue_priority() function is adding
> priorities for a queue without clearing them from others.

Do you know what user-visible mis-behavior this may result in?

> From DesignWare Cores Ethernet Quality-of-Service
> Databook, section 17.1.29 MAC_RxQ_Ctrl2:
> "[...]The software must ensure that the content of this field is
> mutually exclusive to the PSRQ fields for other queues, that is,
> the same priority is not mapped to multiple Rx queues[...]"
> 
> After this patch, rx_queue_priority() function will:
> - assign desired priorities to a queue
> - remove those priorities from all other queues

But also you seem to remove clearing all other prios from the queue:

-	value &= ~GMAC_RXQCTRL_PSRQX_MASK(queue);

and 

-	value &= ~XGMAC_PSRQ(queue);

is that intentional? Commit message should explain why.

> The write sequence of CTRL2 and CTRL3 registers is done in the way to
> ensure this order.

Ensure which order? Looks like you're actually writing in the opposite
order than what I'd expect :S First the register you want to assign to,
and then the register you only clear from.

When you repost please include a Fixes tag.
-- 
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