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a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1710253685; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=4XVmae+JgcDRh2ZKkyqUURMemYqkLUazTfEI4APXLG8=; b=Gkd42EZNkxkb0gExXtDTx7jWtBaTPBoUwDTCkVnine3q786/2VyXE+TFzta5tHdTvyY3r6 0IppMKL/dDQgNVitWDG887sTq0mkp0YSMQMrp4J5KiWgryFdjcMAK0XI5+krNFTqqlkI24 ZPRjAOpPr4JFL9A24qO2FEPoCqbJn3OsrOXd3gK9JhfIlb5jgABbKC+D0DhI1IH8SQtwqn VK/6/AA4WU+xKbG/bu3birdCHd/m1nZqp1Hl47hrjSXlrrTvsPkRZWmOqdhCXDTqi/hr1z nsXWLPu9GxRcJOS1zlHvRJfjTx0Qz1WpvPCqgOgeUuW7E13yopFjKq++prVDSw== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1710253685; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=4XVmae+JgcDRh2ZKkyqUURMemYqkLUazTfEI4APXLG8=; b=cD3gLAD+A5hhLRuybrw9y36IXuxxC0wmJs+Kxm6eMNoqnmzJejztRvj6E/1wUaNsGms837 7RFeuZJRKtJkUtAw== To: Palmer Dabbelt Cc: peterlin@andestech.com, acme@kernel.org, adrian.hunter@intel.com, ajones@ventanamicro.com, alexander.shishkin@linux.intel.com, andre.przywara@arm.com, anup@brainfault.org, aou@eecs.berkeley.edu, atishp@atishpatra.org, conor+dt@kernel.org, Conor Dooley , Conor Dooley , devicetree@vger.kernel.org, Evan Green , geert+renesas@glider.be, guoren@kernel.org, Heiko Stuebner , irogers@google.com, jernej.skrabec@gmail.com, jolsa@kernel.org, jszhang@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-sunxi@lists.linux.dev, locus84@andestech.com, magnus.damm@gmail.com, Mark Rutland , mingo@redhat.com, n.shubin@yadro.com, namhyung@kernel.org, Paul Walmsley , peterlin@andestech.com, peterz@infradead.org, prabhakar.mahadev-lad.rj@bp.renesas.com, rdunlap@infradead.org, robh+dt@kernel.org, samuel@sholland.org, Sunil V L , tim609@andestech.com, uwu@icenowy.me, wens@csie.org, Will Deacon , inochiama@outlook.com, unicorn_wang@outlook.com, wefu@redhat.com, randolph@andestech.com Subject: Re: [PATCH v9 03/10] irqchip/riscv-intc: Introduce Andes hart-level interrupt controller In-Reply-To: References: Date: Tue, 12 Mar 2024 15:28:04 +0100 Message-ID: <871q8fplsb.ffs@tglx> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain On Tue, Mar 12 2024 at 07:23, Palmer Dabbelt wrote: > On Fri, 23 Feb 2024 01:06:44 PST (-0800), tglx@linutronix.de wrote: >> Contains: >> >> f4cc33e78ba8 ("irqchip/riscv-intc: Introduce Andes hart-level interrupt controller") >> 96303bcb401c ("irqchip/riscv-intc: Allow large non-standard interrupt number") >> >> on top of v6.8-rc1 > > Sorry I missed this. I just merged this into my testing tree, it might > take a bit to show up because I've managed to break my VPN so I can't > poke the tester box right now... Alternatively you can just rebase on Linus tree. The interrupt changes are already merged.