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AJvYcCWrwI8EmmnFZtWWUxB6WFGqOzH/jGhYhQGHK5oktCWrLiRIh1qAFArmi6CuIUAS5RFX9ReSfD23vefnuziVxhp+EaSsQT1Jjruanb3w X-Gm-Message-State: AOJu0Yw/eKGDZetWrxA0u6U/uz972Kj5PImxbWt89vtGx0zhgmYnDk6N 7Mw0NWeeB6KZYBHZa35we0usdZK2DkNXTTyP4THmE3kVMS85CmReFJCpcKM5uEA= X-Received: by 2002:a17:902:ac86:b0:1dc:4bf6:7eb4 with SMTP id h6-20020a170902ac8600b001dc4bf67eb4mr13452784plr.31.1710352812163; Wed, 13 Mar 2024 11:00:12 -0700 (PDT) Received: from sw06.internal.sifive.com ([4.53.31.132]) by smtp.gmail.com with ESMTPSA id jj14-20020a170903048e00b001dc30f13e6asm8912264plb.137.2024.03.13.11.00.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 Mar 2024 11:00:11 -0700 (PDT) From: Samuel Holland To: Palmer Dabbelt , linux-riscv@lists.infradead.org Cc: Samuel Holland , Albert Ou , Alexandre Ghiti , Andrew Morton , Charlie Jenkins , Guo Ren , Jisheng Zhang , Kemeng Shi , "Matthew Wilcox (Oracle)" , "Mike Rapoport (IBM)" , Paul Walmsley , Xiao Wang , Yangyu Chen , linux-kernel@vger.kernel.org Subject: [PATCH] riscv: Define TASK_SIZE_MAX for __access_ok() Date: Wed, 13 Mar 2024 10:59:43 -0700 Message-ID: <20240313180010.295747-1-samuel.holland@sifive.com> X-Mailer: git-send-email 2.43.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit TASK_SIZE_MAX should be set to the largest userspace address under any runtime configuration. This optimizes the check in __access_ok(), which no longer needs to compute the current value of TASK_SIZE. It is still safe because addresses between TASK_SIZE and TASK_SIZE_MAX are invalid at the hardware level. This removes about half of the references to pgtable_l[45]_enabled. Signed-off-by: Samuel Holland --- arch/riscv/include/asm/pgtable-64.h | 1 + arch/riscv/include/asm/pgtable.h | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/riscv/include/asm/pgtable-64.h b/arch/riscv/include/asm/pgtable-64.h index b99bd66107a6..a677ef3c0fe2 100644 --- a/arch/riscv/include/asm/pgtable-64.h +++ b/arch/riscv/include/asm/pgtable-64.h @@ -17,6 +17,7 @@ extern bool pgtable_l5_enabled; #define PGDIR_SHIFT_L4 39 #define PGDIR_SHIFT_L5 48 #define PGDIR_SIZE_L3 (_AC(1, UL) << PGDIR_SHIFT_L3) +#define PGDIR_SIZE_L5 (_AC(1, UL) << PGDIR_SHIFT_L5) #define PGDIR_SHIFT (pgtable_l5_enabled ? PGDIR_SHIFT_L5 : \ (pgtable_l4_enabled ? PGDIR_SHIFT_L4 : PGDIR_SHIFT_L3)) diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h index 6066822e7396..2032f8ac5fc5 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -867,6 +867,7 @@ static inline pte_t pte_swp_clear_exclusive(pte_t pte) #ifdef CONFIG_64BIT #define TASK_SIZE_64 (PGDIR_SIZE * PTRS_PER_PGD / 2) #define TASK_SIZE_MIN (PGDIR_SIZE_L3 * PTRS_PER_PGD / 2) +#define TASK_SIZE_MAX (PGDIR_SIZE_L5 * PTRS_PER_PGD / 2) #ifdef CONFIG_COMPAT #define TASK_SIZE_32 (_AC(0x80000000, UL)) -- 2.43.1