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Thu, 14 Mar 2024 10:15:14 GMT Received: from [10.239.29.49] (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Thu, 14 Mar 2024 03:15:08 -0700 Message-ID: <41889d0b-fe20-4fde-a71c-45d928ede11d@quicinc.com> Date: Thu, 14 Mar 2024 18:15:06 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] arm64: dts: qcom: sm8650: Add three missing fastrpc-compute-cb nodes Content-Language: en-US To: Krzysztof Kozlowski , , , , , CC: , , , , References: <20240314063334.31942-1-quic_lxu5@quicinc.com> <88c32ccb-fadd-49e8-a8fc-76f93353d204@quicinc.com> <46e90e1f-1c93-4e88-b73c-94c165217d98@linaro.org> From: Ling Xu In-Reply-To: <46e90e1f-1c93-4e88-b73c-94c165217d98@linaro.org> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: _KX1XI8PGm3nlyF5raEMMPEi0UoW3Iq2 X-Proofpoint-GUID: _KX1XI8PGm3nlyF5raEMMPEi0UoW3Iq2 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-03-14_08,2024-03-13_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 mlxlogscore=999 spamscore=0 adultscore=0 impostorscore=0 malwarescore=0 priorityscore=1501 phishscore=0 suspectscore=0 mlxscore=0 bulkscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2402120000 definitions=main-2403140072 在 2024/3/14 18:09, Krzysztof Kozlowski 写道: > On 14/03/2024 11:05, Ling Xu wrote: >> 在 2024/3/14 14:55, Krzysztof Kozlowski 写道: >>> On 14/03/2024 07:33, Ling Xu wrote: >>>> Add three missing cDSP fastrpc compute-cb nodes for the SM8650 SoC. >>>> >>>> Signed-off-by: Ling Xu >>>> --- >>>> arch/arm64/boot/dts/qcom/sm8650.dtsi | 29 ++++++++++++++++++++++++++++ >>>> 1 file changed, 29 insertions(+) >>>> >>>> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi >>>> index ba72d8f38420..c238ad1be0d4 100644 >>>> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi >>>> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi >>>> @@ -5084,6 +5084,35 @@ >>>> <&apps_smmu 0x19c8 0x0>; >>>> dma-coherent; >>>> }; >>>> + >>>> + /* note: secure cb9 in downstream */ >>>> + >>>> + compute-cb@10 { >>>> + compatible = "qcom,fastrpc-compute-cb"; >>>> + reg = <12>; >>>> + iommus = <&apps_smmu 0x196C 0x0000>, >>>> + <&apps_smmu 0x0C0C 0x0020>, >>>> + <&apps_smmu 0x19CC 0x0000>; >>> >>> Lowercase hex. Please look at the code above, don't copy downstream >>> code. This applies to all your work: don't send us downstream code, but >>> clean it up from all of its problems. >>> >>> Best regards, >>> Krzysztof >>> >> >> Hi, sorry, do you mean that I should delete this line: /* note: secure cb9 in downstream */? >> All I sent are upstream codes, I didn't copy cb9 here and I also see this commented line in sm8550.dtsi. > > My comment was about the style. If you send "upstream codes", how could > you have there uppercase hex? It is even visible in the diff context > that it should be lowercase! > > Best regards, > Krzysztof > Sorry for that, I got it. Thanks for your comment. -- Thx and BRs, Ling Xu