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AJvYcCUwQGuL26XFXC2sWj6N78Rl7IdVN4A0aUZK1U+RV8Onx4B8CI51f6YyfwTOEwxcfK77xnrJi19+HSZ/ma+CsI9pcuBoxeTC3B4efoPt X-Gm-Message-State: AOJu0YyeGoO3Gar1YPa5uW0oPZrSFyZGHEa2MlwasptlwuA2sRB/2AiB /OUzzyRaA9X3eWxQU9imlSwbRLccqkG/lwvCT7qg1LB5tprLhA6vnaIKKYRjnPJbC8JPv+FS5jT li0u3X1RQ+ykf5JL73zCZ+GY6kxjDs//dSPE2vQ== X-Received: by 2002:a05:6102:2907:b0:476:262:1245 with SMTP id cz7-20020a056102290700b0047602621245mr1948187vsb.15.1710417398935; Thu, 14 Mar 2024 04:56:38 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240313123017.362570-1-sumit.garg@linaro.org> <20240313123017.362570-4-sumit.garg@linaro.org> In-Reply-To: From: Sumit Garg Date: Thu, 14 Mar 2024 17:26:27 +0530 Message-ID: Subject: Re: [PATCH v2 3/3] arm64: dts: qcom: apq8016: Add Schneider HMIBSC board DTS To: Stephan Gerhold Cc: Konrad Dybcio , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, andersson@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, caleb.connolly@linaro.org, neil.armstrong@linaro.org, laetitia.mariottini@se.com, pascal.eberhard@se.com, abdou.saker@se.com, jimmy.lalande@se.com, benjamin.missey@non.se.com, daniel.thompson@linaro.org, linux-kernel@vger.kernel.org, Jagdish Gediya Content-Type: text/plain; charset="UTF-8" On Thu, 14 Mar 2024 at 16:13, Stephan Gerhold wrote: > > On Thu, Mar 14, 2024 at 03:02:31PM +0530, Sumit Garg wrote: > > On Thu, 14 Mar 2024 at 14:48, Konrad Dybcio wrote: > > > On 3/14/24 10:04, Sumit Garg wrote: > > > > On Wed, 13 Mar 2024 at 18:34, Konrad Dybcio wrote: > > > >> On 3/13/24 13:30, Sumit Garg wrote: > > > >>> Add Schneider Electric HMIBSC board DTS. The HMIBSC board is an IIoT Edge > > > >>> Box Core board based on the Qualcomm APQ8016E SoC. > > > >>> > > > >>> Support for Schneider Electric HMIBSC. Features: > > > >>> - Qualcomm Snapdragon 410C SoC - APQ8016 (4xCortex A53, Adreno 306) > > > >>> - 1GiB RAM > > > >>> - 8GiB eMMC, SD slot > > > >>> - WiFi and Bluetooth > > > >>> - 2x Host, 1x Device USB port > > > >>> - HDMI > > > >>> - Discrete TPM2 chip over SPI > > > >>> - USB ethernet adaptors (soldered) > > > >>> > > > >>> Co-developed-by: Jagdish Gediya > > > >>> Signed-off-by: Jagdish Gediya > > > >>> Signed-off-by: Sumit Garg > > > >>> --- > > > >> > > > >> [...] > > > >> > > > >>> + memory@80000000 { > > > >>> + reg = <0 0x80000000 0 0x40000000>; > > > >>> + }; > > > >> > > > >> I'm not sure the entirety of DRAM is accessible.. > > > >> > > > >> This override should be unnecessary, as bootloaders generally update > > > >> the size field anyway. > > > > > > > > On this board, U-Boot is used as the first stage bootloader (replacing > > > > Little Kernel (LK), thanks to Stephan's work). And U-Boot consumes > > > > memory range from DT as Linux does but doesn't require any memory to > > > > be reserved for U-Boot itself. So apart from reserved memory nodes > > > > explicitly described in DT all the other DRAM regions are accessible. > > > > > > Still, u-boot has code to fetch the size dynamically, no? > > > > > > > No U-Boot being the first stage bootloader fetches size from DT which > > is bundled into U-Boot binary. > > > > Back when I added support for using U-Boot as first stage bootloader on > DB410c the way it worked is that U-Boot used a fixed amount of DRAM > (originally 968 MiB, later 1 GiB since I fixed this in commit > 1d667227ea51 ("board: dragonboard410c: Fix PHYS_SDRAM_1_SIZE") [1]). > When booting Linux, the Linux DT was dynamically patched with the right > amount of DRAM (obtained from SMEM). So if you had e.g. a Geniatech DB4 > board with 2 GiB DRAM, U-Boot was only using 1 GiB of DRAM, but Linux > later got the full 2 GiB patched into its DTB. > > I didn't have much time for testing U-Boot myself lately but a quick > look at the recent changes suggest that Caleb accidentally removed that > functionality in the recent cleanup. Specifically, the SMEM-based DRAM > size detection was removed in commit 14868845db54 ("board: > dragonboard410c: import board code from mach-snapdragon" [2]), the > msm_fixup_memory() function does not seem to exist anymore now. :') Ah now I see the reasoning for that particular piece of code. Is SMEM based approach the standardized way used by early stage boot-loaders on other Qcom SoCs too? > > Also, the DRAM size is now always taken from the DT (which is probably > better than the previous hardcoded size in the U-Boot board code). > > I think we should bring the dynamic DRAM size detection back, because > there are quite some boards available with varying DRAM size. Restoring > msm_fixup_memory() would likely be easiest, I guess the ideal solution > would be to parse SMEM in U-Boot's dram_init() function so even U-Boot > has the correct amount of DRAM to work with. In the context of the HMIBSC board, it has 1 GB RAM LPDDR3 internal not expandable. IMO, having it in DT as default should be fine. -Sumit > > Thanks, > Stephan > > [1]: https://source.denx.de/u-boot/u-boot/-/commit/1d667227ea512537b8453abeb49abbf19a1a18e8 > [2]: https://source.denx.de/u-boot/u-boot/-/commit/14868845db54b4f64701977385dc9a6e951e4139