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Thu, 14 Mar 2024 07:18:33 -0500 Received: from localhost (uda0133052.dhcp.ti.com [128.247.81.232]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 42ECIXWN094446; Thu, 14 Mar 2024 07:18:33 -0500 Date: Thu, 14 Mar 2024 07:18:33 -0500 From: Nishanth Menon To: Francesco Dolcini CC: Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Francesco Dolcini , , , , =?utf-8?Q?Jo=C3=A3o_Paulo_Silva_Gon=C3=A7alves?= Subject: Re: [PATCH v1] arm64: dts: ti: verdin-am62: use SD1 CD as GPIO Message-ID: <20240314121833.4fngkk35aw44o2x5@array> References: <20240312144956.40211-1-francesco@dolcini.it> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20240312144956.40211-1-francesco@dolcini.it> X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 On 15:49-20240312, Francesco Dolcini wrote: > From: Francesco Dolcini > > TI SDHCI IP has a hardware debounce timer of 1 second as described in Umm... Minor clarification - the SDHCI IP is not TI's - as commit 41fd4caeb00bbd6dc55f056f3e8e956697b0760d says, this was an Arasan IP which was integrated into TI SoCs but needs it's own driver due to some quirkiness in the version TI picked up. Are you OK to rephrase this as TI SDHCI 'instance' rather than 'IP'? If yes, I can do the change locally when I commit. > commit 7ca0f166f5b2 ("mmc: sdhci_am654: Add workaround for card detect > debounce timer"), because of this the boot time increases of up to 1 > second. > > Workaround the issue the same way that is done on > arch/arm64/boot/dts/ti/k3-am625-beagleplay.dts, using the SD1 CD as > GPIO. Side benefit of this will that if you boot out of emmc and when runtime PM disables the mmc instance, you still can detect card detect via GPIO block, which I think is a better source of wakeup than keeping mmc instance powered and clocked waiting for an sdcard insertion event. No action needed, just making a side note. > > Suggested-by: Nishanth Menon > Reported-by: Jo?o Paulo Silva Gon?alves > Closes: https://lore.kernel.org/all/0e81af80de3d55e72f79af83fa5db87f5c9938f8.camel@toradex.com/ > Signed-off-by: Francesco Dolcini > --- > arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi | 12 ++++++++++-- > 1 file changed, 10 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi > index e8d8857ad51f..a9bf2c17f95a 100644 > --- a/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi > @@ -457,6 +457,13 @@ AM62X_IOPAD(0x01c4, PIN_INPUT, 7) /* (B14) SPI0_D1.GPIO1_19 */ /* SODIMM 161 */ > >; > }; > > + /* Verdin SD_1_CD# as GPIO */ > + pinctrl_sd1_cd_gpio: main-gpio1-48-default-pins { > + pinctrl-single,pins = < > + AM62X_IOPAD(0x240, PIN_INPUT_PULLUP, 7) /* (D17) MMC1_SDCD.GPIO1_48 */ /* SODIMM 84 */ > + >; > + }; > + > /* Verdin DSI_1_INT# (pulled-up as active-low) */ > pinctrl_dsi1_int: main-gpio1-49-default-pins { > pinctrl-single,pins = < > @@ -571,7 +578,6 @@ AM62X_IOPAD(0x230, PIN_INPUT, 0) /* (A22) MMC1_DAT0 */ /* SODIMM 80 */ > AM62X_IOPAD(0x22c, PIN_INPUT, 0) /* (B21) MMC1_DAT1 */ /* SODIMM 82 */ > AM62X_IOPAD(0x228, PIN_INPUT, 0) /* (C21) MMC1_DAT2 */ /* SODIMM 70 */ > AM62X_IOPAD(0x224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */ /* SODIMM 72 */ > - AM62X_IOPAD(0x240, PIN_INPUT_PULLUP, 0) /* (D17) MMC1_SDCD */ /* SODIMM 84 */ > >; > }; > > @@ -1441,8 +1447,10 @@ &sdhci0 { > /* Verdin SD_1 */ > &sdhci1 { > pinctrl-names = "default"; > - pinctrl-0 = <&pinctrl_sdhci1>; > + pinctrl-0 = <&pinctrl_sdhci1>, <&pinctrl_sd1_cd_gpio>; > + cd-gpios = <&main_gpio1 48 GPIO_ACTIVE_LOW>; > disable-wp; > + ti,fails-without-test-cd; > vmmc-supply = <®_sdhc1_vmmc>; > vqmmc-supply = <®_sdhc1_vqmmc>; > status = "disabled"; > -- > 2.39.2 > -- Regards, Nishanth Menon Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D