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Thu, 14 Mar 2024 07:56:56 -0700 (PDT) Message-ID: <42c3d591-abe5-4343-9a94-f1705430dcea@sifive.com> Date: Thu, 14 Mar 2024 09:56:54 -0500 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] clk: starfive: jh7100: Use provided clocks instead of hardcoded names Content-Language: en-US To: Geert Uytterhoeven Cc: Albert Ou , linux-clk@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Emil Renner Berthing , Hal Feng , Michael Turquette , Stephen Boyd , Paul Walmsley , Palmer Dabbelt , Krzysztof Kozlowski , Conor Dooley , Andy Shevchenko References: <898aa0925a9598d44721d00145015b215434cb3b.1710414195.git.geert@linux-m68k.org> <695ebdde-3dc3-41b1-b20b-f02c4ba1ae5d@sifive.com> From: Samuel Holland In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Hi Geert, On 2024-03-14 9:48 AM, Geert Uytterhoeven wrote: > On Thu, Mar 14, 2024 at 3:32 PM Samuel Holland > wrote: >> On 2024-03-14 6:05 AM, Geert Uytterhoeven wrote: >>> The Starfive JH7100 clock driver does not use the DT "clocks" property >>> to find its external input clocks, but instead relies on the names of >>> the actual external clock providers. This is fragile, and caused >>> breakage when sanitizing clock names in DT. >>> >>> Fix this by obtaining the external input clocks through the DT "clocks" >>> property, and using their clk_hw objects or corresponding name. >>> >>> Fixes: f03606470886 ("riscv: dts: starfive: replace underscores in node names") >>> Fixes: 4210be668a09ee20 ("clk: starfive: Add JH7100 clock generator driver") >>> Signed-off-by: Geert Uytterhoeven > >>> --- a/drivers/clk/starfive/clk-starfive-jh7100.c >>> +++ b/drivers/clk/starfive/clk-starfive-jh7100.c > >>> @@ -298,13 +311,23 @@ static int __init clk_starfive_jh7100_probe(struct platform_device *pdev) >>> if (IS_ERR(priv->base)) >>> return PTR_ERR(priv->base); >>> >>> + for (idx = 0; idx < EXT_NUM_CLKS; idx++) { >>> + clk = devm_clk_get(&pdev->dev, jh7100_ext_clk[idx]); >>> + if (IS_ERR(clk)) >>> + return PTR_ERR(clk); >>> + >>> + priv->ext[idx] = __clk_get_hw(clk); >>> + } >>> + >>> + osc_sys = clk_hw_get_name(priv->ext[EXT_CLK_OSC_SYS]); >>> + >>> priv->pll[0] = devm_clk_hw_register_fixed_factor(priv->dev, "pll0_out", >>> - "osc_sys", 0, 40, 1); >>> + osc_sys, 0, 40, 1); >>> if (IS_ERR(priv->pll[0])) >>> return PTR_ERR(priv->pll[0]); >>> >>> priv->pll[1] = devm_clk_hw_register_fixed_factor(priv->dev, "pll1_out", >>> - "osc_sys", 0, 64, 1); >>> + osc_sys, 0, 64, 1); >> >> These should use devm_clk_hw_register_fixed_factor_parent_hw(). (Or you could > > Thanks, I didn't know about that function! > >> define a devm_clk_hw_register_fixed_factor_fw_name() and drop the other changes.) > > Sorry, I don't understand what you mean here? In the loop below, the parents are already referenced via .fw_name. That means the string is the DT clock-names property value, not the Linux-internal clock name (see clk_core_get()). These two function calls are the only ones that depend on the internal clock name. If you change them to use .fw_name as well, the clk_core_get() will do the right thing, and you don't need to manually call devm_clk_get(). Regards, Samuel