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AJvYcCVkgCaMzg6odwSc69I6FtYEIulGhAdKMWNHDrKkIAY+2iwJmqP6aXoD+Eh+dds1sN+BA2XxQQlXWA10uWOnT1SnPauueSeloacEcWF5 X-Gm-Message-State: AOJu0YyTpbkSFw+tRvM4Dy0g2BF9CVyRGJAHxUV9ssaIIqC2E6yme+4u 8S2DIy1TN5SDs+2aykaxcMtljtrsahdw8yTvxuFFXD73BADhknUBvEOvzNoHkA== X-Received: by 2002:a05:6a20:2445:b0:1a3:5015:ec93 with SMTP id t5-20020a056a20244500b001a35015ec93mr1101499pzc.26.1710501389194; Fri, 15 Mar 2024 04:16:29 -0700 (PDT) Received: from treapking.tpe.corp.google.com ([2401:fa00:1:10:2f9c:c00a:bf1f:e53c]) by smtp.gmail.com with ESMTPSA id c11-20020a62e80b000000b006e6aee6807dsm3122683pfi.22.2024.03.15.04.16.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 Mar 2024 04:16:29 -0700 (PDT) From: Pin-yen Lin To: Matthias Brugger , AngeloGioacchino Del Regno Cc: linux-arm-kernel@lists.infradead.org, Chen-Yu Tsai , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, =?UTF-8?q?N=C3=ADcolas=20F=20=2E=20R=20=2E=20A=20=2E=20Prado?= , linux-mediatek@lists.infradead.org, Pin-yen Lin Subject: [PATCH v2 1/4] arm64: dts: mediatek: mt8192-asurada: Update min voltage constraint for MT6315 Date: Fri, 15 Mar 2024 19:16:02 +0800 Message-ID: <20240315111621.2263159-2-treapking@chromium.org> X-Mailer: git-send-email 2.44.0.291.gc1ea87d7ee-goog In-Reply-To: <20240315111621.2263159-1-treapking@chromium.org> References: <20240315111621.2263159-1-treapking@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Update the minimum voltage from 300000 uV to 400000 uV so it matches the MT6315 datasheet. Also update the minimum voltage for Vgpu regulator from 606250 uV to 400000 uV because the requested voltage could be lower than the minimum voltage on the GPU OPP table when the MTK Smart Voltage Scaling (SVS) driver is enabled. Fixes: 3183cb62b033 ("arm64: dts: mediatek: asurada: Add SPMI regulators") Signed-off-by: Pin-yen Lin --- Changes in v2: - Change the value to 400000 and update other mt6315 usages arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi index 43d80334610a..2eafe66fbb8a 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -1421,7 +1421,7 @@ regulators { mt6315_6_vbuck1: vbuck1 { regulator-compatible = "vbuck1"; regulator-name = "Vbcpu"; - regulator-min-microvolt = <300000>; + regulator-min-microvolt = <400000>; regulator-max-microvolt = <1193750>; regulator-enable-ramp-delay = <256>; regulator-allowed-modes = <0 1 2>; @@ -1431,7 +1431,7 @@ mt6315_6_vbuck1: vbuck1 { mt6315_6_vbuck3: vbuck3 { regulator-compatible = "vbuck3"; regulator-name = "Vlcpu"; - regulator-min-microvolt = <300000>; + regulator-min-microvolt = <400000>; regulator-max-microvolt = <1193750>; regulator-enable-ramp-delay = <256>; regulator-allowed-modes = <0 1 2>; @@ -1448,7 +1448,7 @@ regulators { mt6315_7_vbuck1: vbuck1 { regulator-compatible = "vbuck1"; regulator-name = "Vgpu"; - regulator-min-microvolt = <606250>; + regulator-min-microvolt = <400000>; regulator-max-microvolt = <800000>; regulator-enable-ramp-delay = <256>; regulator-allowed-modes = <0 1 2>; -- 2.44.0.291.gc1ea87d7ee-goog