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>> >> On some platforms(e.g.,x86), the max cache_id is the amount of L3 caches, >> so it is not in the range of 0x3fff. But some platforms use higher >> cache_id, e.g., arm uses cache_id as locator for cache MSC. This will >> cause below issue if cache_id > 0x3fff likes: >> /sys/fs/resctrl/mon_groups/p1/mon_data/mon_L3_1048564 # cat llc_occupancy >> cat: read error: No such file or directory >> >> This is the call trace when cat llc_occupancy: >> rdtgroup_mondata_show() >> domid = md.u.domid >> d = resctrl_arch_find_domain(r, domid) >> >> d is null here because of lossing precision >> >> Signed-off-by: Rex Nie >> --- >> fs/resctrl/internal.h | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/fs/resctrl/internal.h b/fs/resctrl/internal.h >> index 7a6f46b4edd0..096317610949 100644 >> --- a/fs/resctrl/internal.h >> +++ b/fs/resctrl/internal.h >> @@ -94,7 +94,7 @@ union mon_data_bits { >> struct { >> unsigned int rid : 10; >> enum resctrl_event_id evtid : 8; >> - unsigned int domid : 14; >> + u32 domid; >> } u; >> }; >> > resctrl currently supports 32bit builds. Fixing this issue* in this way I have never bothered about 32bit builds.   Is Intel still testing 32bit builds? > would first require that resctrl (the architecture independent fs part) > depend on X86_64. Is this a change that everybody will be comfortable with? > > (Of course, there are other solutions available to address the issue mentioned > in this patch that do not require depending on X86_64, but I would like > to take this moment to understand the sentiment surrounding continuing support > for 32bit resctrl.) I am thinking we have bigger problem here. The structure pointer "union mon_data_bits priv;" is created in stack and passed to create mondata directory. We are reading it later again in rdtgroup_mondata_show. How is this pointer valid again?  Shouldn't we use static pointer or allocate memory for the pointer? thanks Babu > > Thank you. > > Reinette > > * Please note that this is not an urgent fix but instead a preparatory change > for future Arm support. >