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[209.85.219.175]) by smtp.gmail.com with ESMTPSA id bs19-20020a05690c071300b00607bc220c5esm794529ywb.102.2024.03.15.11.35.21 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 15 Mar 2024 11:35:21 -0700 (PDT) Received: by mail-yb1-f175.google.com with SMTP id 3f1490d57ef6-d9b9adaf291so2136428276.1; Fri, 15 Mar 2024 11:35:21 -0700 (PDT) X-Forwarded-Encrypted: i=1; AJvYcCWMWKAW+go8i+wWDm+i9Ge+WYz4FXcuQbzbnsYpmYaHE97D2rI9zDZKCxVGSWUfPcsaJVceWHocRcsQVyVbsQNvWY217Nfdj8D3emsvxUmzXos+XQhzglSGpoLiLq36tnP/SrObhJB+rI4mBPfY6VLa9cHMvY+5COPtbTjA2ZrLQlDc0uu/8Z7Tsn7TcgRovQjSXE9+zf19EZ5j9jl72vHpGMw+3X2X X-Received: by 2002:a25:f40c:0:b0:dc7:2401:df4e with SMTP id q12-20020a25f40c000000b00dc72401df4emr5038303ybd.39.1710527721014; Fri, 15 Mar 2024 11:35:21 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240315103033.141226-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20240315103033.141226-2-prabhakar.mahadev-lad.rj@bp.renesas.com> In-Reply-To: From: Geert Uytterhoeven Date: Fri, 15 Mar 2024 19:35:08 +0100 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 1/4] dt-bindings: i2c: renesas,riic: Document R9A09G057 support To: Prabhakar Cc: Chris Brandt , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm , Wolfram Sang , linux-renesas-soc@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Fabrizio Castro , Lad Prabhakar Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Prabhakar,, On Fri, Mar 15, 2024 at 1:50=E2=80=AFPM Geert Uytterhoeven wrote: > On Fri, Mar 15, 2024 at 11:31=E2=80=AFAM Prabhakar wrote: > > From: Lad Prabhakar > > > > Document support for the I2C Bus Interface (RIIC) available in the > > Renesas RZ/V2H(P) (R9A09G057) SoC. > > > > The RIIC interface in the Renesas RZ/V2H(P) differs from RZ/A in a > > couple of ways: > > - Register offsets for the RZ/V2H(P) SoC differ from those of the > > RZ/A SoC. > > - RZ/V2H register access is limited to 8-bit, whereas RZ/A supports > > 8/16/32-bit. > > - RZ/V2H has bit differences in the slave address register. > > > > To accommodate these differences in the existing driver, a new compatib= le > > string "renesas,riic-r9a09g057" is added. As it looks like there will be a v3 of this series, please drop "in the existing driver". Gr{oetje,eeting}s, Geert --=20 Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k= org In personal conversations with technical people, I call myself a hacker. Bu= t when I'm talking to journalists I just say "programmer" or something like t= hat. -- Linus Torvalds