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Date: Sat, 16 Mar 2024 16:03:00 +0200
From: Justin Swartz <justin.swartz@risingedge.co.za>
To: =?UTF-8?Q?Ar=C4=B1n=C3=A7_=C3=9CNAL?= <arinc.unal@arinc9.com>
Cc: Sergio Paracuellos <sergio.paracuellos@gmail.com>, Rob Herring
 <robh+dt@kernel.org>, Krzysztof Kozlowski
 <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>,
 Thomas Bogendoerfer <tsbogend@alpha.franken.de>, Matthias Brugger
 <matthias.bgg@gmail.com>, AngeloGioacchino Del Regno
 <angelogioacchino.delregno@collabora.com>, linux-mips@vger.kernel.org,
 devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
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Subject: Re: [PATCH 00/14] mips: dts: ralink: mt7621: improve DTS style
In-Reply-To: <31b3d00f-6cf4-4bf8-ad78-a8354d57c518@arinc9.com>
References: <20240316045442.31469-1-justin.swartz@risingedge.co.za>
 <31b3d00f-6cf4-4bf8-ad78-a8354d57c518@arinc9.com>
Message-ID: <c7eb79ee77542db3a539d8bb7719dba9@risingedge.co.za>
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On 2024-03-16 11:24, Arınç ÜNAL wrote:
> On 16.03.2024 07:54, Justin Swartz wrote:
>> This set of patches was created with the intention of cleaning up
>> arch/mips/boot/dts/ralink/mt7621.dtsi so that it is aligned with
>> the Devicetree Sources (DTS) Coding Style [1] [2] guide.
>> 
>> [1] Documentation/devicetree/bindings/dts-coding-style.rst
>> 
>> [2] https://docs.kernel.org/devicetree/bindings/dts-coding-style.html
>> 
>> Justin Swartz (14):
>>    mips: dts: ralink: mt7621: reorder cpu node attributes
>>    mips: dts: ralink: mt7621: reorder cpuintc node attributes
>>    mips: dts: ralink: mt7621: reorder mmc regulator attributes
>>    mips: dts: ralink: mt7621: reorder sysc node attributes
>>    mips: dts: ralink: mt7621: reorder gpio node attributes
>>    mips: dts: ralink: mt7621: reorder i2c node attributes
>>    mips: dts: ralink: mt7621: reorder spi0 node attributes
>>    mips: dts: ralink: mt7621: move pinctrl and sort its children
>>    mips: dts: ralink: mt7621: reorder mmc node attributes
>>    mips: dts: ralink: mt7621: reorder gic node attributes
>>    mips: dts: ralink: mt7621: reorder ethernet node attributes and 
>> kids
>>    mips: dts: ralink: mt7621: reorder pcie node attributes and 
>> children
>>    mips: dts: ralink: mt7621: reorder pci?_phy attributes
>>    mips: dts: ralink: mt7621: reorder the attributes of the root node
>> 
>>   arch/mips/boot/dts/ralink/mt7621.dtsi | 430 
>> ++++++++++++++------------
>>   1 file changed, 239 insertions(+), 191 deletions(-)
> 
> A well done patch series. Thank you very much for doing this!
> 
> Arınç

++ for reviewing them all.

As you have at least one board that features an MT7621 SoC,
please may you (and anyone else willing) take a look at a
patch [1] that I've submitted for spi-mt7621.c which allows
GPIO chip select lines to be used as well as the native chip
selects.

There's already been some back and forth with Mark Brown about
the initial version of the patch (the linked patch is v2) and,
of course I messed up how I send v2, as you'll read in the thread.

It seems you weren't included because I rely on [2] to determine
which people to address as maintainers when sending patches.

Is there a better approach for populating git send's --to argument?

Regards
Justin


[1] 
https://lore.kernel.org/linux-mediatek/20240316010302.20776-1-justin.swartz@risingedge.co.za/

[2] scripts/get_maintainer.pl --nogit --nogit-fallback --norolestats 
--nol