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Date: Sun, 17 Mar 2024 14:58:32 +0000
From: Conor Dooley <conor@kernel.org>
To: Rob Herring <robh@kernel.org>
Cc: Joshua Yeong <joshua.yeong@starfivetech.com>, paul.walmsley@sifive.com,
	palmer@dabbelt.com, aou@eecs.berkeley.edu, geert+renesas@glider.be,
	prabhakar.mahadev-lad.rj@bp.renesas.com, conor.dooley@microchip.com,
	alexghiti@rivosinc.com, evan@rivosinc.com, ajones@ventanamicro.com,
	heiko@sntech.de, guoren@kernel.org, uwu@icenowy.me,
	jszhang@kernel.org, krzysztof.kozlowski+dt@linaro.org,
	conor+dt@kernel.org, leyfoon.tan@starfivetech.com,
	jeeheng.sia@starfivetech.com, linux-riscv@lists.infradead.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 4/4] dt-bindings: cache: Add docs for StarFive
 StarLink-500 cache controller
Message-ID: <20240317-snide-pounce-4a82ee1704ad@spud>
References: <20240314061205.26143-1-joshua.yeong@starfivetech.com>
 <20240314061205.26143-5-joshua.yeong@starfivetech.com>
 <20240315163607.GA1444248-robh@kernel.org>
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On Fri, Mar 15, 2024 at 10:36:07AM -0600, Rob Herring wrote:
> On Thu, Mar 14, 2024 at 02:12:05PM +0800, Joshua Yeong wrote:
> > Add DT binding documentation used by StarFive's
> > Starlink-500 cache controller.
> >=20
> > Signed-off-by: Joshua Yeong <joshua.yeong@starfivetech.com>
> > ---
> >  .../cache/starfive,starlink-500-cache.yaml    | 62 +++++++++++++++++++
> >  1 file changed, 62 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/cache/starfive,st=
arlink-500-cache.yaml
> >=20
> > diff --git a/Documentation/devicetree/bindings/cache/starfive,starlink-=
500-cache.yaml b/Documentation/devicetree/bindings/cache/starfive,starlink-=
500-cache.yaml
> > new file mode 100644
> > index 000000000000..97ddf7db39e9
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/cache/starfive,starlink-500-cac=
he.yaml
> > @@ -0,0 +1,62 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/cache/starfive,starlink-500-cache.y=
aml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: StarFive StarLink-500 Cache Controller
> > +
> > +maintainers:
> > +  - Joshua Yeong <joshua.yeong@starfivetech.com>
> > +
> > +description:
> > +  StarFive's StarLink-500 controller manages cache shared between clus=
ters of
> > +  CPU cores. The cache driver provides mechanism to perform invalidate=
 and write
> > +  back functionality to the shared memory.
>=20
> What a driver does is not relevant to the binding. You could describe=20
> what the registers control though.
>=20
> > +
> > +allOf:
> > +  - $ref: /schemas/cache-controller.yaml#
> > +
> > +# We need a select here so we don't match all nodes with 'cache'
> > +select:
> > +  properties:
> > +    compatible:
> > +      contains:
> > +        enum:
> > +          - starfive,starlink-500-cache
> > +
> > +  required:
> > +    - compatible
> > +
> > +properties:
> > +  compatible:
> > +    items:
> > +      - const: starfive,starlink-500-cache
> > +      - const: cache

You're also missing a soc-specific compatible here as far as I can tell,
as one of the other patches in this series specifically calls out the
JH8100 as where this cache controller is. AFAICT, "starlink-500" is the
name of the IP or of the coreplex - it's not the name of the SoC.

> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  cache-size: true
> > +  cache-sets: true
> > +  cache-block-size: true
> > +  cache-level: true
> > +  cache-unified: true
>=20
> Drop these and...
>=20
> > +
> > +additionalProperties: false
>=20
> ... use 'unevaluatedProperties' instead.
>=20
> > +
> > +required:
> > +  - compatible
> > +  - reg
>=20
> cache-unified should be required as I imagine the cache is always=20
> unified. Perhaps other properties too (cache-level already is)?

And I also suspect that a load of the values can be restricted to
specific values for that jh8100 compatible.

>=20
> > +
> > +examples:
> > +  - |
> > +      cache-controller@15000000 {
> > +        compatible =3D "starfive,starlink-500-cache", "cache";
> > +        reg =3D <0x15000000 0x278>;
> > +        cache-block-size =3D <64>;
> > +        cache-level =3D <3>;
> > +        cache-sets =3D <8192>;
> > +        cache-size =3D <0x400000>;
> > +        cache-unified;
> > +      };
> > --=20
> > 2.25.1
> >=20

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