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References: <20240314-mainline-ad7944-3-wire-mode-v2-1-d469da0705d2@baylibre.com>
 <ZfX5jynjW4M9pvw1@surfacebook.localdomain> <20240318124041.0000032d@Huawei.com>
In-Reply-To: <20240318124041.0000032d@Huawei.com>
From: Andy Shevchenko <andy.shevchenko@gmail.com>
Date: Mon, 18 Mar 2024 15:09:32 +0200
Message-ID: <CAHp75VeQcvuEy4V6-+3PeWTZJ9=Qae0AiiNB93OOw3wuc-uh3A@mail.gmail.com>
Subject: Re: [PATCH v2] iio: adc: ad7944: Add support for "3-wire mode"
To: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: David Lechner <dlechner@baylibre.com>, Jonathan Cameron <jic23@kernel.org>, 
	Michael Hennerich <michael.hennerich@analog.com>, =?UTF-8?B?TnVubyBTw6E=?= <nuno.sa@analog.com>, 
	linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org
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On Mon, Mar 18, 2024 at 2:41=E2=80=AFPM Jonathan Cameron
<Jonathan.Cameron@huawei.com> wrote:
> > >  struct ad7944_adc {
> > >     struct spi_device *spi;
> > > +   enum ad7944_spi_mode spi_mode;
> > >     /* Chip-specific timing specifications. */
> > >     const struct ad7944_timing_spec *timing_spec;
> > >     /* GPIO connected to CNV pin. */
> > > @@ -58,6 +75,9 @@ struct ad7944_adc {
> > >      } sample __aligned(IIO_DMA_MINALIGN);
> > >  };
> >
> > Have you run `pahole` to see if there is a better place for a new membe=
r?
>
> I know this matters for structures where we see lots of them, but do we a=
ctually
> care for one offs?  Whilst it doesn't matter here I'd focus much more
> on readability and like parameter grouping for cases like this than wasti=
ng
> a few bytes.

This is _also_ true, but think more about cache line contamination.
Even not-so-important bytes may decrease the performance. In some
cases it's tolerable, in some it is not (high-speed ADC). In general I
assume that the developer has to understand many aspects of the
software and cache line contamination may be last but definitely not
least.

--=20
With Best Regards,
Andy Shevchenko