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From: Sandipan Das <sandipan.das@amd.com>
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Subject: [PATCH v4 0/2] perf/x86/amd: Fix for LBR Freeze
Date: Tue, 19 Mar 2024 13:48:15 +0530
Message-ID: <cover.1710836172.git.sandipan.das@amd.com>
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Contains a fix for usage of LBR Freeze.

Previous versions can be found at:
v3: https://lore.kernel.org/all/cover.1706526029.git.sandipan.das@amd.com/
v2: https://lore.kernel.org/all/cover.1704103399.git.sandipan.das@amd.com/
v1: https://lore.kernel.org/all/cover.1702833179.git.sandipan.das@amd.com/

Changes in v4:
 - Move scattered feature bits from CPUID 0x80000022[EAX] to a dedicated
   word as suggested by Ingo.
 - Remove patches that have been merged (patch 2 and 3 from v3).

Changes in v3:
 - As suggested by Boris, update the commit message of the first patch
   with the reason behind making the LBR and PMC Freeze feature bit
   visible in /proc/cpuinfo.

Changes in v2:
 - Make the LBR and PMC Freeze feature bit visible in /proc/cpuinfo. As
   suggested by Stephane, this will be useful to determine if it is
   feasible to perform kernel FDO on a system.

Sandipan Das (2):
  x86/cpufeatures: Add dedicated feature word for CPUID leaf
    0x80000022[EAX]
  perf/x86/amd/lbr: Use freeze based on availability

 arch/x86/events/amd/core.c               |  4 ++--
 arch/x86/events/amd/lbr.c                | 16 ++++++++++------
 arch/x86/include/asm/cpufeature.h        |  7 +++++--
 arch/x86/include/asm/cpufeatures.h       | 11 ++++++++---
 arch/x86/include/asm/disabled-features.h |  3 ++-
 arch/x86/include/asm/required-features.h |  3 ++-
 arch/x86/kernel/cpu/common.c             |  3 +++
 arch/x86/kernel/cpu/scattered.c          |  2 --
 arch/x86/kvm/cpuid.c                     |  5 +----
 arch/x86/kvm/reverse_cpuid.h             |  1 -
 10 files changed, 33 insertions(+), 22 deletions(-)

-- 
2.34.1