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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-OriginatorOrg: chipsnmedia.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: SL2P216MB1246.KORP216.PROD.OUTLOOK.COM X-MS-Exchange-CrossTenant-Network-Message-Id: 2226b28c-4b46-4c10-a2d6-08dc47fcabff X-MS-Exchange-CrossTenant-originalarrivaltime: 19 Mar 2024 10:09:32.2617 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 4d70c8e9-142b-4389-b7f2-fa8a3c68c467 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: uwJQOwQuS/e/ssXcbd0Xg2fNLAHdhuGgxnG26K3cd3xmGXVegTlHs+pBbMnVgcWzEhd5ZpzZ7+RorAZBcrfZ+lzsD6x39CY3a65P0Yg5MgY= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SE1P216MB1272 Hi, Ivan. >-----Original Message----- >From: Ivan Bornyakov >Sent: Monday, March 18, 2024 11:42 PM >To: Nas Chung ; jackson.lee >; Mauro Carvalho Chehab >Cc: Ivan Bornyakov ; Philipp Zabel >; Rob Herring ; Krzysztof >Kozlowski ; Conor Dooley >; linux-media@vger.kernel.org; linux- >kernel@vger.kernel.org; devicetree@vger.kernel.org >Subject: [PATCH 1/6] media: chips-media: wave5: support decoding higher >bit-depth profiles > >Add support for decoding higher than 8 bit-depth profiles by scaling FBC >buffer stride and size by the factor of (bitdepth / 8). > >Signed-off-by: Ivan Bornyakov >--- > .../platform/chips-media/wave5/wave5-vpu-dec.c | 15 ++------------- > 1 file changed, 2 insertions(+), 13 deletions(-) > >diff --git a/drivers/media/platform/chips-media/wave5/wave5-vpu-dec.c >b/drivers/media/platform/chips-media/wave5/wave5-vpu-dec.c >index ef227af72348..aa0401f35d32 100644 >--- a/drivers/media/platform/chips-media/wave5/wave5-vpu-dec.c >+++ b/drivers/media/platform/chips-media/wave5/wave5-vpu-dec.c >@@ -1055,6 +1055,7 @@ static int wave5_prepare_fb(struct vpu_instance >*inst) > int ret, i; > struct v4l2_m2m_buffer *buf, *n; > struct v4l2_m2m_ctx *m2m_ctx =3D inst->v4l2_fh.m2m_ctx; >+ u32 bitdepth =3D inst->codec_info- >>dec_info.initial_info.luma_bitdepth; > > linear_num =3D v4l2_m2m_num_dst_bufs_ready(m2m_ctx); > non_linear_num =3D inst->fbc_buf_count; >@@ -1063,7 +1064,7 @@ static int wave5_prepare_fb(struct vpu_instance >*inst) > struct frame_buffer *frame =3D &inst->frame_buf[i]; > struct vpu_buf *vframe =3D &inst->frame_vbuf[i]; > >- fb_stride =3D inst->dst_fmt.width; >+ fb_stride =3D ALIGN(inst->dst_fmt.width * bitdepth / 8, 32); > fb_height =3D ALIGN(inst->dst_fmt.height, 32); > luma_size =3D fb_stride * fb_height; > >@@ -1408,22 +1409,10 @@ static int wave5_vpu_dec_start_streaming(struct >vb2_queue *q, unsigned int count > if (ret) > goto free_bitstream_vbuf; > } else if (q->type =3D=3D V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) { >- struct dec_initial_info *initial_info =3D >- &inst->codec_info->dec_info.initial_info; >- > if (inst->state =3D=3D VPU_INST_STATE_STOP) > ret =3D switch_state(inst, VPU_INST_STATE_INIT_SEQ); > if (ret) > goto return_buffers; >- >- if (inst->state =3D=3D VPU_INST_STATE_INIT_SEQ) { >- if (initial_info->luma_bitdepth !=3D 8) { >- dev_info(inst->dev->dev, "%s: no support for %d >bit depth", >- __func__, initial_info->luma_bitdepth); >- ret =3D -EINVAL; >- goto return_buffers; >- } >- } > } > TI wave521C version cannot support 10bit decoding. So, We need above error checking codes. How about adding support_10bit flag in wave5_match_data like below ? static const struct wave5_match_data ti_wave521c_data =3D { .support_10bit =3D false; }; > return ret; >-- >2.44.0