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AJvYcCVHBZmwHvMQCTKbN7DXWMzI1PSOW2WXSBruWrXZcDU3sSHPvsDX1TFdYFAaHkefYRZFafrCQJ6kCxyAU0A8ANnH0dxzNL7pXNpCer9z X-Gm-Message-State: AOJu0YyoggRXe5HFEN+okpY7kgzDU7XwS84N7aeUUUCsSxu27qFx9jc+ FMaIOc7gMz3EyFb5HyqhTjwkLmy4yHNjC0hquLLFrCzCuTsB/cGZpyZYgHroCQnQrg+1eIgPNju iuhtcIcnjY1xTr3FrsEBdE+djje9TFGA/MuFxLQ== X-Received: by 2002:a05:6a21:1798:b0:1a3:6fe9:4060 with SMTP id nx24-20020a056a21179800b001a36fe94060mr5194683pzb.17.1710908403659; Tue, 19 Mar 2024 21:20:03 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Sam Edwards Date: Tue, 19 Mar 2024 22:19:53 -0600 Message-ID: Subject: [RESEND RFC PATCH 0/5] Enhancements for mv64xxx I2C driver To: Gregory CLEMENT , Andi Shyti Cc: linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Salutations, Linux I2C team! Sorry about the resend; it seems my mail client "helpfully" swallowed the newlines on any line consisting only of whitespace, garbling the patches. I am working with an Allwinner T113-s3 based board; the internal I2C bus of which has a Realtek RTL8370MB-CG Ethernet switch coexisting with other I2C devices. The RTL8370MB-CG deviates from "conventional" I2C read operations in that it expects the hardware register after the addr+read byte before it turns around the bus to send the value. For this reason, the `realtek-smi` driver currently implements the protocol via bit-banging. However, I am in the process of developing a separate patch series to promote this driver to a "full" I2C driver, leveraging I2C_M_NOSTART to support this odd read operation. In anticipation of that, I am preparing this series comprising five patches to improve the functionality and reliability of the I2C adapter enough to support this kind of device. I have heavily tested these changes on the Allwinner-style mv64xxx core, but not the Marvell-style, and have not been able to test 10-bit addressing. I would greatly appreciate if anyone here could test this series, especially on non-Allwinner boards and/or boards with 10-bit devices. I'm a bit skeptical of using I2C_M_NOSTART for this purpose. The driver does not (and cannot) support "just any" use of I2C_M_NOSTART, so it may be inappropriate to claim the I2C_FUNC_NOSTART capability. On the other hand, I searched high and low and couldn't find any use of I2C_M_NOSTART that *wouldn't* be supported by this change, so this could very well be exactly what clients understand I2C_FUNC_NOSTART to mean. Given that the alternative would be inventing a new flag ("I2C_M_READEXTRA"?) and figuring out how to supply input bytes and output bytes in the same i2c_msg, I opted for the NOSTART route instead. I look forward to any feedback, bug reports, test results, questions, concerns, commentary, or discussion that you can offer! Best regards, Sam Sam Edwards (5): i2c: mv64xxx: Clear bus errors before transfer i2c: mv64xxx: Clean up the private data struct i2c: mv64xxx: Refactor FSM i2c: mv64xxx: Allow continuing after read i2c: mv64xxx: Implement I2C_FUNC_NOSTART drivers/i2c/busses/i2c-mv64xxx.c | 430 ++++++++++++++++++++++--------- 1 file changed, 302 insertions(+), 128 deletions(-) -- 2.43.2