Received: by 2002:ab2:620c:0:b0:1ef:ffd0:ce49 with SMTP id o12csp1343650lqt; Wed, 20 Mar 2024 00:15:31 -0700 (PDT) X-Forwarded-Encrypted: i=3; AJvYcCUYtybTWI0ghqWpJlzoXed8JUNm/JBap3a0YKU6OZIYyWhIAqT83iqtc9WEp0HsmEOjRoMYWgsCYmeFlMA307aB9Q0xg7EGOROskkYjTQ== X-Google-Smtp-Source: AGHT+IEB88LPQiz2agmJ89ji7lxg3WhtahrCA/HcQWWyyBKVS76f20Bjj3ERoDc09vAn4zOfpfw6 X-Received: by 2002:a17:902:64c9:b0:1de:f92a:18dd with SMTP id y9-20020a17090264c900b001def92a18ddmr14367181pli.62.1710918931043; Wed, 20 Mar 2024 00:15:31 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1710918931; cv=pass; d=google.com; s=arc-20160816; b=GAuXlcJTa0obcdkua2JN5d45zuwGofG1xguhtI7kA704X5Aa1mvVPNq2Sbh3wLePcC 98EXoaGGmr4q+pNqF2LfCmQX1TA33U+xsE6SmQ39466oDbsshuMoFQRz/RjX6gcCDp7e pO0uKqNaEFq4fxyHgll2W6cCLF6ysnd3HBGt0F/V9wwT4e70nDlun3rr1An/OpYVv1w6 Qs4mGjdzhn9+iymVUchLoigLVd5eaNd4klam7xk6qwmJckFzzWfY4ZCsXC8wfFGrDFFs 5FqnqDoEPAsZshimzpk6op+8b3pCr4jD+lcSlvJa6wxLBgGIkjWZ/Ewyj+ElMO/jZv9C qZvg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:list-unsubscribe:list-subscribe:list-id:precedence :user-agent:message-id:date:references:in-reply-to:subject:cc:to :from:dkim-signature; bh=gdIWeQwvDT3rhf5HyP+WWQdYJA08AV2CpbIRwmyEHS4=; fh=Eip7FIlSvOIdAZGPwJhskLyDvLZH4sm8t2huFHJNK7Y=; b=a31g9c2BqIK4lFSytrpdoE3d8IoSadY8Qw6EE93f3lDC+Pg4rb+I2se0OCpl1JVjmG ziS1seQJ0wcgo1/K0p0ywfxES4ZsuhJTZ0VBLMI1T9nyarhUam+/aF9d1oNTb82psTmA VCSmPvm5BcOJzo7HrcZPYufinDF+AZJJ5Fhvjt/ENJGxq4W6Aj99Ax1EAOmlDTJ08EzL Z0yiImFG2ZLiCSpRswy4c1IgkbfaOX6QkRHz2t41keIeJ1iDRiTUuJWVOV57Mf1nUreL JecnJ0cW3a9QRV56597195YLesXxLIj68CGBqlSfwytfaQqVxmY7bjgYe/W/6mtgdZAN G35Q==; dara=google.com ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=d+BNSo1Y; arc=pass (i=1 spf=pass spfdomain=intel.com dkim=pass dkdomain=intel.com dmarc=pass fromdomain=intel.com); spf=pass (google.com: domain of linux-kernel+bounces-108530-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-108530-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from sv.mirrors.kernel.org (sv.mirrors.kernel.org. [2604:1380:45e3:2400::1]) by mx.google.com with ESMTPS id z12-20020a170902cccc00b001e001c4b458si8110168ple.602.2024.03.20.00.15.30 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Mar 2024 00:15:31 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel+bounces-108530-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) client-ip=2604:1380:45e3:2400::1; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=d+BNSo1Y; arc=pass (i=1 spf=pass spfdomain=intel.com dkim=pass dkdomain=intel.com dmarc=pass fromdomain=intel.com); spf=pass (google.com: domain of linux-kernel+bounces-108530-linux.lists.archive=gmail.com@vger.kernel.org designates 2604:1380:45e3:2400::1 as permitted sender) smtp.mailfrom="linux-kernel+bounces-108530-linux.lists.archive=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id B3D13282593 for ; Wed, 20 Mar 2024 07:15:30 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 73E062E3F7; Wed, 20 Mar 2024 07:15:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="d+BNSo1Y" Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3685E2C85A; Wed, 20 Mar 2024 07:15:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.19 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710918924; cv=none; b=CpAcoiE2OjyprinrhdZDlp/Jx51c4CfsO1mDiswNK3O9BdZ3lcfewNlbkeLOEMkHgHYBk9/pexp9AtqpHzRx6ccb5q8kSFhDeD7KyEvB536OXzGx3RVAj96g0DljX10/dSKa52rKEJB2aY3d3j+QqQ8wmzVc7t8m0v0Xx82mn00= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710918924; c=relaxed/simple; bh=dGANDLcgpPUgVShpcdJEWJFjwNSJyHiL6/yYzMvvXG8=; h=From:To:Cc:Subject:In-Reply-To:References:Date:Message-ID: MIME-Version:Content-Type; b=Gf9dz4M9qE3CmmPYD19AudCx2tamRKJ+fX5ubrOgEjTKN0uUq75GFwlmDiXPU0HWklD+KN39BYTn+bisKAaR46dbi6SvtkOxUN0rxqat5aptt+UC/dyaiUqYBuzO9FZiVotp7o3TZBFJVvS972h+c4E9OisL0kKwBfAbwXYOtBI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=d+BNSo1Y; arc=none smtp.client-ip=192.198.163.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1710918922; x=1742454922; h=from:to:cc:subject:in-reply-to:references:date: message-id:mime-version; bh=dGANDLcgpPUgVShpcdJEWJFjwNSJyHiL6/yYzMvvXG8=; b=d+BNSo1Y1ztmgwVFE4PG6xRww3hzXUWgRMnGyHS8erXPzxr3Kh8hQHKC LD/pjxzxRaiLqvGqmp98i2TwsS60Et+XgCnZAklXX1/dlPC2KCMtnL/B9 7UEvVg3hV2HaddXDcpT2ET0vpRnQJeEWFKwkFHpVKlISYZNOWw1jnN7wf XFsoJmvY4/3xoc5I6XG2wArofb8b12+4ed9WMnDhnfBnKNiImHJLRqFdm 9chjjd54Lx55jX47mx0qgA1G5FHjRgDSbLsItDsehF4Ch+Pg0rXDr/iiB m5+MCdYylF8ukxUKbZzmrk1vkZanoxtZ2ezIyoC1ln8iNHE/+6vszgtYk A==; X-IronPort-AV: E=McAfee;i="6600,9927,11018"; a="5675053" X-IronPort-AV: E=Sophos;i="6.07,139,1708416000"; d="scan'208";a="5675053" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Mar 2024 00:15:16 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,139,1708416000"; d="scan'208";a="18528664" Received: from yhuang6-desk2.sh.intel.com (HELO yhuang6-desk2.ccr.corp.intel.com) ([10.238.208.55]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Mar 2024 00:15:10 -0700 From: "Huang, Ying" To: "Ho-Ren (Jack) Chuang" Cc: "Gregory Price" , aneesh.kumar@linux.ibm.com, mhocko@suse.com, tj@kernel.org, john@jagalactic.com, "Eishan Mirakhur" , "Vinicius Tavares Petrucci" , "Ravis OpenSrc" , "Alistair Popple" , "Srinivasulu Thanneeru" , Dan Williams , Vishal Verma , Dave Jiang , Andrew Morton , nvdimm@lists.linux.dev, linux-cxl@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org, "Ho-Ren (Jack) Chuang" , "Ho-Ren (Jack) Chuang" , qemu-devel@nongnu.org, Hao Xiang Subject: Re: [PATCH v3 1/2] memory tier: dax/kmem: create CPUless memory tiers after obtaining HMAT info In-Reply-To: <20240320061041.3246828-2-horenchuang@bytedance.com> (Ho-Ren Chuang's message of "Wed, 20 Mar 2024 06:10:39 +0000") References: <20240320061041.3246828-1-horenchuang@bytedance.com> <20240320061041.3246828-2-horenchuang@bytedance.com> Date: Wed, 20 Mar 2024 15:13:17 +0800 Message-ID: <87edc5s7ea.fsf@yhuang6-desk2.ccr.corp.intel.com> User-Agent: Gnus/5.13 (Gnus v5.13) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=ascii "Ho-Ren (Jack) Chuang" writes: > The current implementation treats emulated memory devices, such as > CXL1.1 type3 memory, as normal DRAM when they are emulated as normal memory > (E820_TYPE_RAM). However, these emulated devices have different > characteristics than traditional DRAM, making it important to > distinguish them. Thus, we modify the tiered memory initialization process > to introduce a delay specifically for CPUless NUMA nodes. This delay > ensures that the memory tier initialization for these nodes is deferred > until HMAT information is obtained during the boot process. Finally, > demotion tables are recalculated at the end. > > More details: You have done several stuff in one patch. So you need "more details". You may separate them into multiple patches. One for echo "*" below. But I have no strong opinion on that. > * late_initcall(memory_tier_late_init); > Some device drivers may have initialized memory tiers between > `memory_tier_init()` and `memory_tier_late_init()`, potentially bringing > online memory nodes and configuring memory tiers. They should be excluded > in the late init. > > * Abstract common functions into `mt_find_alloc_memory_type()` > Since different memory devices require finding or allocating a memory type, > these common steps are abstracted into a single function, > `mt_find_alloc_memory_type()`, enhancing code scalability and conciseness. > > * Handle cases where there is no HMAT when creating memory tiers > There is a scenario where a CPUless node does not provide HMAT information. > If no HMAT is specified, it falls back to using the default DRAM tier. > > * Change adist calculation code to use another new lock, `mt_perf_lock`. > In the current implementation, iterating through CPUlist nodes requires > holding the `memory_tier_lock`. However, `mt_calc_adistance()` will end up > trying to acquire the same lock, leading to a potential deadlock. > Therefore, we propose introducing a standalone `mt_perf_lock` to protect > `default_dram_perf`. This approach not only avoids deadlock but also > prevents holding a large lock simultaneously. > > * Upgrade `set_node_memory_tier` to support additional cases, including > default DRAM, late CPUless, and hot-plugged initializations. > To cover hot-plugged memory nodes, `mt_calc_adistance()` and > `mt_find_alloc_memory_type()` are moved into `set_node_memory_tier()` to > handle cases where memtype is not initialized and where HMAT information is > available. > > * Introduce `default_memory_types` for those memory types that are not > initialized by device drivers. > Because late initialized memory and default DRAM memory need to be managed, > a default memory type is created for storing all memory types that are > not initialized by device drivers and as a fallback. > > Signed-off-by: Ho-Ren (Jack) Chuang > Signed-off-by: Hao Xiang > --- > drivers/dax/kmem.c | 13 +---- > include/linux/memory-tiers.h | 7 +++ > mm/memory-tiers.c | 94 +++++++++++++++++++++++++++++++++--- > 3 files changed, 95 insertions(+), 19 deletions(-) > > diff --git a/drivers/dax/kmem.c b/drivers/dax/kmem.c > index 42ee360cf4e3..de1333aa7b3e 100644 > --- a/drivers/dax/kmem.c > +++ b/drivers/dax/kmem.c > @@ -55,21 +55,10 @@ static LIST_HEAD(kmem_memory_types); > > static struct memory_dev_type *kmem_find_alloc_memory_type(int adist) > { > - bool found = false; > struct memory_dev_type *mtype; > > mutex_lock(&kmem_memory_type_lock); > - list_for_each_entry(mtype, &kmem_memory_types, list) { > - if (mtype->adistance == adist) { > - found = true; > - break; > - } > - } > - if (!found) { > - mtype = alloc_memory_type(adist); > - if (!IS_ERR(mtype)) > - list_add(&mtype->list, &kmem_memory_types); > - } > + mtype = mt_find_alloc_memory_type(adist, &kmem_memory_types); > mutex_unlock(&kmem_memory_type_lock); > > return mtype; It seems that there's some miscommunication about my previous comments about this. What I suggested is to create one separate patch, which moves mt_find_alloc_memory_type() and mt_put_memory_types() into memory-tiers.c. And make this patch the first one of the series. > diff --git a/include/linux/memory-tiers.h b/include/linux/memory-tiers.h > index 69e781900082..b2135334ac18 100644 > --- a/include/linux/memory-tiers.h > +++ b/include/linux/memory-tiers.h > @@ -48,6 +48,8 @@ int mt_calc_adistance(int node, int *adist); > int mt_set_default_dram_perf(int nid, struct access_coordinate *perf, > const char *source); > int mt_perf_to_adistance(struct access_coordinate *perf, int *adist); > +struct memory_dev_type *mt_find_alloc_memory_type(int adist, > + struct list_head *memory_types); > #ifdef CONFIG_MIGRATION > int next_demotion_node(int node); > void node_get_allowed_targets(pg_data_t *pgdat, nodemask_t *targets); > @@ -136,5 +138,10 @@ static inline int mt_perf_to_adistance(struct access_coordinate *perf, int *adis > { > return -EIO; > } > + > +struct memory_dev_type *mt_find_alloc_memory_type(int adist, struct list_head *memory_types) > +{ > + return NULL; > +} > #endif /* CONFIG_NUMA */ > #endif /* _LINUX_MEMORY_TIERS_H */ > diff --git a/mm/memory-tiers.c b/mm/memory-tiers.c > index 0537664620e5..d9b96b21b65a 100644 > --- a/mm/memory-tiers.c > +++ b/mm/memory-tiers.c > @@ -6,6 +6,7 @@ > #include > #include > #include > +#include We don't need this anymore. > #include "internal.h" > > @@ -36,6 +37,11 @@ struct node_memory_type_map { > > static DEFINE_MUTEX(memory_tier_lock); > static LIST_HEAD(memory_tiers); > +/* > + * The list is used to store all memory types that are not created > + * by a device driver. > + */ > +static LIST_HEAD(default_memory_types); > static struct node_memory_type_map node_memory_types[MAX_NUMNODES]; > struct memory_dev_type *default_dram_type; > > @@ -505,7 +511,8 @@ static inline void __init_node_memory_type(int node, struct memory_dev_type *mem > static struct memory_tier *set_node_memory_tier(int node) > { > struct memory_tier *memtier; > - struct memory_dev_type *memtype; > + struct memory_dev_type *memtype, *mtype = NULL; It seems unnecessary to introduce another variable, just use memtype? > + int adist = MEMTIER_ADISTANCE_DRAM; > pg_data_t *pgdat = NODE_DATA(node); > > > @@ -514,7 +521,18 @@ static struct memory_tier *set_node_memory_tier(int node) > if (!node_state(node, N_MEMORY)) > return ERR_PTR(-EINVAL); > > - __init_node_memory_type(node, default_dram_type); > + mt_calc_adistance(node, &adist); > + if (adist != MEMTIER_ADISTANCE_DRAM && > + node_memory_types[node].memtype == NULL) { > + mtype = mt_find_alloc_memory_type(adist, &default_memory_types); > + if (IS_ERR(mtype)) { > + mtype = default_dram_type; > + pr_info("Failed to allocate a memory type. Fall back.\n"); > + } > + } else > + mtype = default_dram_type; This can be simplified to mt_calc_adistance(node, &adist); if (node_memory_types[node].memtype == NULL) { mtype = mt_find_alloc_memory_type(adist, &default_memory_types); if (IS_ERR(mtype)) { mtype = default_dram_type; pr_info("Failed to allocate a memory type. Fall back.\n"); } } > + __init_node_memory_type(node, mtype); > > memtype = node_memory_types[node].memtype; > node_set(node, memtype->nodes); > @@ -623,6 +641,55 @@ void clear_node_memory_type(int node, struct memory_dev_type *memtype) > } > EXPORT_SYMBOL_GPL(clear_node_memory_type); > > +struct memory_dev_type *mt_find_alloc_memory_type(int adist, struct list_head *memory_types) > +{ > + bool found = false; > + struct memory_dev_type *mtype; > + > + list_for_each_entry(mtype, memory_types, list) { > + if (mtype->adistance == adist) { > + found = true; > + break; > + } > + } > + if (!found) { > + mtype = alloc_memory_type(adist); > + if (!IS_ERR(mtype)) > + list_add(&mtype->list, memory_types); > + } > + > + return mtype; > +} > +EXPORT_SYMBOL_GPL(mt_find_alloc_memory_type); > + > +/* > + * This is invoked via late_initcall() to create > + * CPUless memory tiers after HMAT info is ready or > + * when there is no HMAT. Better to avoid HMAT in general code. How about something as below? This is invoked via late_initcall() to initialize memory tiers for CPU-less memory nodes after drivers initialization. Which is expect to provide adistance algorithms. > + */ > +static int __init memory_tier_late_init(void) > +{ > + int nid; > + > + mutex_lock(&memory_tier_lock); > + for_each_node_state(nid, N_MEMORY) > + if (!node_state(nid, N_CPU) && > + node_memory_types[nid].memtype == NULL) > + /* > + * Some device drivers may have initialized memory tiers > + * between `memory_tier_init()` and `memory_tier_late_init()`, > + * potentially bringing online memory nodes and > + * configuring memory tiers. Exclude them here. > + */ > + set_node_memory_tier(nid); > + > + establish_demotion_targets(); > + mutex_unlock(&memory_tier_lock); > + > + return 0; > +} > +late_initcall(memory_tier_late_init); > + > static void dump_hmem_attrs(struct access_coordinate *coord, const char *prefix) > { > pr_info( > @@ -631,12 +698,16 @@ static void dump_hmem_attrs(struct access_coordinate *coord, const char *prefix) > coord->read_bandwidth, coord->write_bandwidth); > } > > +/* > + * The lock is used to protect the default_dram_perf. > + */ > +static DEFINE_MUTEX(mt_perf_lock); Miscommunication here too. Should be moved to near the "default_dram_perf" definition. And it protects not only default_dram_perf. > int mt_set_default_dram_perf(int nid, struct access_coordinate *perf, > const char *source) > { > int rc = 0; > > - mutex_lock(&memory_tier_lock); > + mutex_lock(&mt_perf_lock); > if (default_dram_perf_error) { > rc = -EIO; > goto out; > @@ -684,7 +755,7 @@ int mt_set_default_dram_perf(int nid, struct access_coordinate *perf, > } > > out: > - mutex_unlock(&memory_tier_lock); > + mutex_unlock(&mt_perf_lock); > return rc; > } > > @@ -700,7 +771,7 @@ int mt_perf_to_adistance(struct access_coordinate *perf, int *adist) > perf->read_bandwidth + perf->write_bandwidth == 0) > return -EINVAL; > > - mutex_lock(&memory_tier_lock); > + mutex_lock(&mt_perf_lock); > /* > * The abstract distance of a memory node is in direct proportion to > * its memory latency (read + write) and inversely proportional to its > @@ -713,7 +784,7 @@ int mt_perf_to_adistance(struct access_coordinate *perf, int *adist) > (default_dram_perf.read_latency + default_dram_perf.write_latency) * > (default_dram_perf.read_bandwidth + default_dram_perf.write_bandwidth) / > (perf->read_bandwidth + perf->write_bandwidth); > - mutex_unlock(&memory_tier_lock); > + mutex_unlock(&mt_perf_lock); > > return 0; > } > @@ -826,7 +897,8 @@ static int __init memory_tier_init(void) > * For now we can have 4 faster memory tiers with smaller adistance > * than default DRAM tier. > */ > - default_dram_type = alloc_memory_type(MEMTIER_ADISTANCE_DRAM); > + default_dram_type = mt_find_alloc_memory_type( > + MEMTIER_ADISTANCE_DRAM, &default_memory_types); > if (IS_ERR(default_dram_type)) > panic("%s() failed to allocate default DRAM tier\n", __func__); > > @@ -836,6 +908,14 @@ static int __init memory_tier_init(void) > * types assigned. > */ > for_each_node_state(node, N_MEMORY) { > + if (!node_state(node, N_CPU)) > + /* > + * Defer memory tier initialization on CPUless numa nodes. > + * These will be initialized after firmware and devices are > + * initialized. > + */ > + continue; > + > memtier = set_node_memory_tier(node); > if (IS_ERR(memtier)) > /* -- Best Regards, Huang, Ying