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bh=8zhUcMHgW8RImpLOFFWUdVjfodb9oNMgadrLsX11UVo=; b=lZCnSeSlA4DcmdZl80bV6j7Po5zE27RDGkI+NkNdnsJs0t/8lQ0Pq9cd wy+YzGLG3e8BFuYREcDyGYNoddQVZawy+PXHM0Xf9Ai8jlVuLB9EJ62NL cDPCdLawavS/6PmMEnitDjUvqCMOHUndnmYgRoCALKBGIPvhOXUzmKyHT 3rPjPoW6jqeRk+/Cb9ZTorUCRUHqwAEl8Ei3Qt6mueomGg/QnGY3gND2+ J9dMXguZF8SQkkBpFnSTLXthzQMqKv0QDTb4LDTxOddrL5EiJflPCAg6b xPhGqnYtjrj4t0X1XXUAexlRFI7a3shS09qsLXvfNgBTEh7v+V5E5oz14 A==; X-IronPort-AV: E=McAfee;i="6600,9927,11019"; a="5816216" X-IronPort-AV: E=Sophos;i="6.07,141,1708416000"; d="scan'208";a="5816216" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Mar 2024 14:50:21 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,141,1708416000"; d="scan'208";a="45386606" Received: from ls.sc.intel.com (HELO localhost) ([172.25.112.31]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Mar 2024 14:50:19 -0700 Date: Wed, 20 Mar 2024 14:50:13 -0700 From: Isaku Yamahata To: "Huang, Kai" Cc: isaku.yamahata@intel.com, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, isaku.yamahata@gmail.com, Paolo Bonzini , erdemaktas@google.com, Sean Christopherson , Sagi Shahar , chen.bo@intel.com, hang.yuan@intel.com, tina.zhang@intel.com, Binbin Wu , Yuan Yao , isaku.yamahata@linux.intel.com Subject: Re: [PATCH v19 030/130] KVM: TDX: Add helper functions to print TDX SEAMCALL error Message-ID: <20240320215013.GJ1994522@ls.amr.corp.intel.com> References: <1259755bde3a07ec4dc2c78626fa348cf7323b33.1708933498.git.isaku.yamahata@intel.com> <315bfb1b-7735-4e26-b881-fcaa25e0d3f3@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <315bfb1b-7735-4e26-b881-fcaa25e0d3f3@intel.com> On Wed, Mar 20, 2024 at 01:29:07PM +1300, "Huang, Kai" wrote: > > > On 26/02/2024 9:25 pm, isaku.yamahata@intel.com wrote: > > From: Isaku Yamahata > > > > Add helper functions to print out errors from the TDX module in a uniform > > manner. > > Likely we need more information here. See below. > > > > > Signed-off-by: Isaku Yamahata > > Reviewed-by: Binbin Wu > > Reviewed-by: Yuan Yao > > --- > > v19: > > - dropped unnecessary include > > > > v18: > > - Added Reviewed-by Binbin. > > The tag doesn't show in the SoB chain. > > > > > Signed-off-by: Isaku Yamahata > > --- > > [...] > > > +void pr_tdx_error(u64 op, u64 error_code, const struct tdx_module_args *out) > > +{ > > + if (!out) { > > + pr_err_ratelimited("SEAMCALL (0x%016llx) failed: 0x%016llx\n", > > + op, error_code); > > + return; > > + } > > I think this is the reason you still want the @out in tdx_seamcall()? > > But I am not sure either -- even if you want to have @out *here* -- why > cannot you pass a NULL explicitly when you *know* the concerned SEAMCALL > doesn't have a valid output? > > > + > > +#define MSG \ > > + "SEAMCALL (0x%016llx) failed: 0x%016llx RCX 0x%016llx RDX 0x%016llx R8 0x%016llx R9 0x%016llx R10 0x%016llx R11 0x%016llx\n" > > + pr_err_ratelimited(MSG, op, error_code, out->rcx, out->rdx, out->r8, > > + out->r9, out->r10, out->r11); > > +} > > Besides the regs that you are printing, there are more regs (R12-R15, RDI, > RSI) in the structure. > > It's not clear why you only print some, but not all. > > AFAICT the VP.ENTER SEAMCALL can have all regs as valid output? Only those are used for SEAMCALLs except TDH.VP.ENTER. TDH.VP.ENTER is an exception. As discussed at [1], out can be eliminated. We will have only limited output. If we go for that route, we'll have the two following functions. Does it make sense? void pr_tdx_error(u64 op, u64 error_code) { pr_err_ratelimited("SEAMCALL (0x%016llx) failed: 0x%016llx\n", op, error_code); } void pr_tdx_sept_error(u64 op, u64 error_code, const union tdx_sept_entry *entry, const union tdx_sept_level_state *level_state) { #define MSG \ "SEAMCALL (0x%016llx) failed: 0x%016llx entry 0x%016llx level_state 0x%016llx\n" pr_err_ratelimited(MSG, op, error_code, entry->raw, level_state->raw); } [1] https://lore.kernel.org/kvm/20240320213600.GI1994522@ls.amr.corp.intel.com/ > > Anyway, that being said, you might need to put more text in > changelog/comment to make this patch (at least more) reviewable. > -- Isaku Yamahata