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bh=QEydSPBqt/QCL6B+mc4yp2WGTbDT5hEdcQk6+KWkD4Y=; b=We/BiDAWE4WUa3Pn2MzkX9gBtczDaieaNOq2lm9JgN+AgLw4edP5Mwdt dkZV2qu9Z0gxCd1dK6OpEvp6KWVce3N1lPqJClMUlhgfSeduCF+5Oky9I 7s5zJqMb6NZwCuN/Xm3GkE+iEP4WwG+EJNvPnoPjbAH0kjglExCNT8AB6 PZzR+VyL0QA9/N5ciXmr1H1h8yUcxYXzywQPl15K/TEQSv948S7V5qncJ j41H+0T3ilMt/c8cqUmeDKAL+OotvVHwYDTkf6GsHCgXNEO5s/gdNLpDC n/dlz3PoIhBWyJRmW+K/TCq2h0GfGnc6LM1s7kMoNsCLtrf/56nTCi9Lw g==; X-IronPort-AV: E=McAfee;i="6600,9927,11019"; a="5902329" X-IronPort-AV: E=Sophos;i="6.07,141,1708416000"; d="scan'208";a="5902329" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Mar 2024 21:41:34 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.07,141,1708416000"; d="scan'208";a="18850240" Received: from yhuang6-desk2.sh.intel.com (HELO yhuang6-desk2.ccr.corp.intel.com) ([10.238.208.55]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Mar 2024 21:41:30 -0700 From: "Huang, Ying" To: Ryan Roberts Cc: Andrew Morton , David Hildenbrand , Matthew Wilcox , Gao Xiang , Yu Zhao , Yang Shi , Michal Hocko , Kefeng Wang , Barry Song <21cnbao@gmail.com>, Chris Li , , Subject: Re: [PATCH v4 4/6] mm: swap: Allow storage of all mTHP orders In-Reply-To: (Ryan Roberts's message of "Wed, 20 Mar 2024 12:22:18 +0000") References: <20240311150058.1122862-1-ryan.roberts@arm.com> <20240311150058.1122862-5-ryan.roberts@arm.com> <87jzm751n3.fsf@yhuang6-desk2.ccr.corp.intel.com> Date: Thu, 21 Mar 2024 12:39:36 +0800 Message-ID: <8734skryev.fsf@yhuang6-desk2.ccr.corp.intel.com> User-Agent: Gnus/5.13 (Gnus v5.13) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=ascii Ryan Roberts writes: > Hi Huang, Ying, > > > On 12/03/2024 07:51, Huang, Ying wrote: >> Ryan Roberts writes: >> >>> Multi-size THP enables performance improvements by allocating large, >>> pte-mapped folios for anonymous memory. However I've observed that on an >>> arm64 system running a parallel workload (e.g. kernel compilation) >>> across many cores, under high memory pressure, the speed regresses. This >>> is due to bottlenecking on the increased number of TLBIs added due to >>> all the extra folio splitting when the large folios are swapped out. >>> >>> Therefore, solve this regression by adding support for swapping out mTHP >>> without needing to split the folio, just like is already done for >>> PMD-sized THP. This change only applies when CONFIG_THP_SWAP is enabled, >>> and when the swap backing store is a non-rotating block device. These >>> are the same constraints as for the existing PMD-sized THP swap-out >>> support. >>> >>> Note that no attempt is made to swap-in (m)THP here - this is still done >>> page-by-page, like for PMD-sized THP. But swapping-out mTHP is a >>> prerequisite for swapping-in mTHP. >>> >>> The main change here is to improve the swap entry allocator so that it >>> can allocate any power-of-2 number of contiguous entries between [1, (1 >>> << PMD_ORDER)]. This is done by allocating a cluster for each distinct >>> order and allocating sequentially from it until the cluster is full. >>> This ensures that we don't need to search the map and we get no >>> fragmentation due to alignment padding for different orders in the >>> cluster. If there is no current cluster for a given order, we attempt to >>> allocate a free cluster from the list. If there are no free clusters, we >>> fail the allocation and the caller can fall back to splitting the folio >>> and allocates individual entries (as per existing PMD-sized THP >>> fallback). >>> >>> The per-order current clusters are maintained per-cpu using the existing >>> infrastructure. This is done to avoid interleving pages from different >>> tasks, which would prevent IO being batched. This is already done for >>> the order-0 allocations so we follow the same pattern. >>> >>> As is done for order-0 per-cpu clusters, the scanner now can steal >>> order-0 entries from any per-cpu-per-order reserved cluster. This >>> ensures that when the swap file is getting full, space doesn't get tied >>> up in the per-cpu reserves. >>> >>> This change only modifies swap to be able to accept any order mTHP. It >>> doesn't change the callers to elide doing the actual split. That will be >>> done in separate changes. > > [...] > >>> @@ -905,17 +961,18 @@ static int scan_swap_map_slots(struct swap_info_struct *si, >>> } >>> >>> if (si->swap_map[offset]) { >>> + VM_WARN_ON(order > 0); >>> unlock_cluster(ci); >>> if (!n_ret) >>> goto scan; >>> else >>> goto done; >>> } >>> - WRITE_ONCE(si->swap_map[offset], usage); >>> - inc_cluster_info_page(si, si->cluster_info, offset); >>> + memset(si->swap_map + offset, usage, nr_pages); >> >> Add barrier() here corresponds to original WRITE_ONCE()? >> unlock_cluster(ci) may be NOP for some swap devices. > > Looking at this a bit more closely, I'm not sure this is needed. Even if there > is no cluster, the swap_info is still locked, so unlocking that will act as a > barrier. There are a number of other callsites that memset(si->swap_map) without > an explicit barrier and with the swap_info locked. > > Looking at the original commit that added the WRITE_ONCE() it was worried about > a race with reading swap_map in _swap_info_get(). But that site is now annotated > with a data_race(), which will suppress the warning. And I don't believe there > are any places that read swap_map locklessly and depend upon observing ordering > between it and other state? So I think the si unlock is sufficient? > > I'm not planning to add barrier() here. Let me know if you disagree. swap_map[] may be read locklessly in swap_offset_available_and_locked() in parallel. IIUC, WRITE_ONCE() here is to make the writing take effect as early as possible there. > >> >>> + add_cluster_info_page(si, si->cluster_info, offset, nr_pages); >>> unlock_cluster(ci); -- Best Regards, Huang, Ying