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Thu, 21 Mar 2024 14:37:28 +0000 Received: from AcuMS.Aculab.com ([::1]) by AcuMS.aculab.com ([::1]) with mapi id 15.00.1497.048; Thu, 21 Mar 2024 14:37:28 +0000 From: David Laight To: 'Russell King' CC: Ard Biesheuvel , 'Jiangfeng Xiao' , "arnd@arndb.de" , "keescook@chromium.org" , "haibo.li@mediatek.com" , "angelogioacchino.delregno@collabora.com" , "amergnat@baylibre.com" , "akpm@linux-foundation.org" , "dave.hansen@linux.intel.com" , "douzhaolei@huawei.com" , "gustavoars@kernel.org" , "jpoimboe@kernel.org" , "kepler.chenxin@huawei.com" , "kirill.shutemov@linux.intel.com" , "linux-hardening@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-mm@kvack.org" , "linux-arm-kernel@lists.infradead.org" , "nixiaoming@huawei.com" , "peterz@infradead.org" , "wangbing6@huawei.com" , "wangfangpeng1@huawei.com" , "jannh@google.com" , "willy@infradead.org" Subject: RE: [PATCH v2] ARM: unwind: improve unwinders for noreturn case Thread-Topic: [PATCH v2] ARM: unwind: improve unwinders for noreturn case Thread-Index: AQHae3ROEuI+AaCprEesIWGaAOB7ebFB9uHAgAAWtoCAAAVW8IAACy4AgAADrmCAAAjqAIAAC+ng Date: Thu, 21 Mar 2024 14:37:28 +0000 Message-ID: <9d6057b110034c04b6b590522c8c69cc@AcuMS.aculab.com> References: <1710906278-23851-1-git-send-email-xiaojiangfeng@huawei.com> <84a57ca8-8963-ca24-8bd1-ddc5c33bf4da@huawei.com> <0fd55e156195440bb1d815dd8300894b@AcuMS.aculab.com> In-Reply-To: Accept-Language: en-GB, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: aculab.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable From: Russell King > Sent: 21 March 2024 13:08 >=20 > On Thu, Mar 21, 2024 at 12:57:07PM +0000, David Laight wrote: > > From: Russell King > > > Sent: 21 March 2024 12:23 > > ... > > > > That might mean you can get the BL in the middle of a function > > > > but where the following instruction is for the 'no stack frame' > > > > side of the branch. > > > > That is very likely to break any stack offset calculations. > > > > > > No it can't. At any one point in the function, the stack has to be in > > > a well defined state, so that access to local variables can work, and > > > also the stack can be correctly unwound. If there exists a point in > > > the function body which can be reached where the stack could be in tw= o > > > different states, then the stack can't be restored to the parent > > > context. > > > > Actually you can get there with a function that has a lot of args. > > So you can have: > > =09if (...) { > > =09=09push x > > =09=09bl func > > =09=09add %sp, #8 > > =09} > > =09code; > > which is fine. >=20 > No you can't.... and that isn't even Arm code. Arm doesn't use %sp. > Moreover, that "bl" will stomp over the link register, meaning this > function can not return. With 9+ arguments they spill to see https://godbolt.org/z/Yj3ovd8bY Where the compiler generates: f9: cmp w0, 0 ble .L2 sub sp, sp, #32 mov w7, w0 mov w6, w0 mov w5, w0 mov w4, w0 mov w3, w0 stp x29, x30, [sp, 16] add x29, sp, 16 mov w2, w0 mov w1, w0 str w0, [sp] bl f L2: ret A traceback from inside f() definitely needs to use LR-4 for the stack offset. (arm64 doesn't seem to support -mno-sched-prolog). I've failed to get different sized stack frames for the true/false sides of the branch. The compiler seems to pre-allocate the space for extra args rather than using 'push' type instructions. This was certainly better for some x86 cpu (p-pro?) but has now gone out of fashion. =09David - Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1= PT, UK Registration No: 1397386 (Wales)