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AJvYcCV50TrGZeJAqhvQvZkEHyuUbnBMWH6KhytrmgQYwSSrPkLrOhWowjQTQ/j+iT56fm8Ekg6vxzFRrxfqne0aUCbXhno8KXN2H4gfpmT3AUtYbqVJM2OjtnqS/hCiGUmyraGQnUwh0QXD9hg= X-Gm-Message-State: AOJu0YxjVuDTmCX4DxP83DkfINrhbGKX5YDWkD298x9nOY1DNwirQo/4 PBEfikLIBYeH1kVyn2H00nInhGRIAHWzLjEoNtvnFR30B42AjpskStoFwrqkI2bk9Q== X-Received: by 2002:a17:903:2450:b0:1dd:a50c:1fdd with SMTP id l16-20020a170903245000b001dda50c1fddmr1873946pls.65.1711085388034; Thu, 21 Mar 2024 22:29:48 -0700 (PDT) Received: from localhost.localdomain ([221.220.133.103]) by smtp.gmail.com with ESMTPSA id e5-20020a170902d38500b001dffa622527sm882978pld.225.2024.03.21.22.29.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Mar 2024 22:29:47 -0700 (PDT) From: Jianfeng Liu To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org Cc: robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, heiko@sntech.de, jacob-chen@iotwrt.com, ezequiel@vanguardiasur.com.ar, mchehab@kernel.org, liujianfeng1994@gmail.com, sfr@canb.auug.org.au Subject: [PATCH v1 2/2] arm64: dts: rockchip: Add RGA2 support to rk3588 Date: Fri, 22 Mar 2024 13:29:15 +0800 Message-Id: <20240322052915.3507937-3-liujianfeng1994@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240322052915.3507937-1-liujianfeng1994@gmail.com> References: <20240322052915.3507937-1-liujianfeng1994@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit RK3588 also features a RGA2 block. Add the necessary device tree node. Signed-off-by: Jianfeng Liu --- arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 87b83c87b..8f130177b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -387,6 +387,17 @@ psci { method = "smc"; }; + rga: rga@fdb80000 { + compatible = "rockchip,rk3588-rga", "rockchip,rk3288-rga"; + reg = <0x0 0xfdb80000 0x0 0x180>; + interrupts = ; + clocks = <&cru ACLK_RGA2>, <&cru HCLK_RGA2>, <&cru CLK_RGA2_CORE>; + clock-names = "aclk", "hclk", "sclk"; + resets = <&cru SRST_RGA2_CORE>, <&cru SRST_A_RGA2>, <&cru SRST_H_RGA2>; + reset-names = "core", "axi", "ahb"; + power-domains = <&power RK3588_PD_VDPU>; + }; + spll: clock-0 { compatible = "fixed-clock"; clock-frequency = <702000000>; -- 2.34.1