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AJvYcCXab5tS1rUuSHD3W1ajVHtT6LGb5C9b0cfF41U4iBDgLjtwc4E6l4AL2OT3GpNi2MG8X7KhRAY+mE/Qi9nPO9GWyYpdsLdVPn17LUN3 X-Gm-Message-State: AOJu0YwtTg+m4Z+2e60CpOySo3gyFGC4wC3Xb+ynAku8QpggkAaAxT+I rHtDqPO7r4cuy6EcCkpxPFxz/1ds3GzY8/Dn1dTc/O/H+60JSe2HrrhP4r56nNAi75gcDQfQLNz Ap2tKK8x4KR1EpKPIkzCxeqXJcrlMJaIZU+l/rw== X-Received: by 2002:a25:dbd0:0:b0:dc2:1f53:3a4f with SMTP id g199-20020a25dbd0000000b00dc21f533a4fmr1686940ybf.5.1711104890696; Fri, 22 Mar 2024 03:54:50 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20240322-fp4-tcpm-v1-0-c5644099d57b@fairphone.com> <20240322-fp4-tcpm-v1-5-c5644099d57b@fairphone.com> In-Reply-To: <20240322-fp4-tcpm-v1-5-c5644099d57b@fairphone.com> From: Dmitry Baryshkov Date: Fri, 22 Mar 2024 12:54:39 +0200 Message-ID: Subject: Re: [PATCH 5/5] arm64: dts: qcom: sm7225-fairphone-fp4: Enable USB role switching To: Luca Weiss Cc: Bjorn Andersson , Konrad Dybcio , Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , "Bryan O'Donoghue" , Greg Kroah-Hartman , ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-usb@vger.kernel.org Content-Type: text/plain; charset="UTF-8" On Fri, 22 Mar 2024 at 10:03, Luca Weiss wrote: > > Configure the Type-C and VBUS regulator on PM7250B and wire it up to the > USB PHY, so that USB role and orientation switching works. > > Signed-off-by: Luca Weiss > --- > With this patch I'm not quite sure if the 'ports' are connected > correctly, though functionally everything appears to work fine. > > On some other SoCs port@1 in qmpphy and a second port in dwc3 are > connected together also - one port of USB 2.0 HS, one for USB 3.0 SS. > > Here I'm following sm8250's solution. Also checking the binding doc > doesn't reveal anything useful. Thanks for pointing it out. The SM8250 / RB5 predated final DP bindings / graphs. As such it didn't fully describe the signal chain (the signals go from DWC3 and from DP controllers to the QMP PHY, where they are muxed to the 4 output lanes). I'll post an update for sm8250 / bindings doc. I'd kindly ask to connect qmp / port@1 and dwc / port@1 > --- > arch/arm64/boot/dts/qcom/sm6350.dtsi | 25 ++++++++++ > arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts | 57 ++++++++++++++++++++++- > 2 files changed, 81 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi > index 24bcec3366ef..b267500467f0 100644 > --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi > @@ -1686,6 +1686,27 @@ usb_1_qmpphy: phy@88e8000 { > #phy-cells = <1>; > > status = "disabled"; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + > + usb_1_qmpphy_out: endpoint {}; > + }; > + > + port@1 { > + reg = <1>; > + }; > + > + port@2 { > + reg = <2>; > + > + usb_1_qmpphy_dp_in: endpoint {}; > + }; > + }; > }; > > dc_noc: interconnect@9160000 { > @@ -1861,6 +1882,10 @@ usb_1_dwc3: usb@a600000 { > snps,hird-threshold = /bits/ 8 <0x10>; > phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>; > phy-names = "usb2-phy", "usb3-phy"; > + > + port { > + usb_1_role_switch_out: endpoint {}; > + }; > }; > }; > > diff --git a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts > index bc67e8c1fe4d..104f23ec322d 100644 > --- a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts > +++ b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts > @@ -19,6 +19,7 @@ > #include > #include > #include > +#include > #include "sm7225.dtsi" > #include "pm6150l.dtsi" > #include "pm6350.dtsi" > @@ -543,6 +544,50 @@ conn-therm@1 { > }; > }; > > +&pm7250b_typec { > + vdd-pdphy-supply = <&vreg_l3a>; > + > + status = "okay"; > + > + connector { > + compatible = "usb-c-connector"; > + > + power-role = "source"; > + data-role = "dual"; > + self-powered; > + > + source-pdos = + PDO_FIXED_DUAL_ROLE | > + PDO_FIXED_USB_COMM | > + PDO_FIXED_DATA_SWAP)>; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + pm7250b_role_switch_in: endpoint { > + remote-endpoint = <&usb_1_role_switch_out>; > + }; > + }; > + > + port@1 { > + reg = <1>; > + pm7250b_typec_mux_in: endpoint { > + remote-endpoint = <&usb_1_qmpphy_out>; > + }; > + }; > + }; > + }; > +}; > + > +&pm7250b_vbus { > + regulator-min-microamp = <500000>; > + regulator-max-microamp = <1500000>; > + status = "okay"; > +}; > + > &pmk8350_rtc { > status = "okay"; > }; > @@ -726,7 +771,12 @@ &usb_1 { > > &usb_1_dwc3 { > maximum-speed = "super-speed"; > - dr_mode = "peripheral"; > + dr_mode = "otg"; > + usb-role-switch; > +}; > + > +&usb_1_role_switch_out { > + remote-endpoint = <&pm7250b_role_switch_in>; > }; > > &usb_1_hsphy { > @@ -740,10 +790,15 @@ &usb_1_hsphy { > &usb_1_qmpphy { > vdda-phy-supply = <&vreg_l22a>; > vdda-pll-supply = <&vreg_l16a>; > + orientation-switch; > > status = "okay"; > }; > > +&usb_1_qmpphy_out { > + remote-endpoint = <&pm7250b_typec_mux_in>; > +}; > + > &wifi { > vdd-0.8-cx-mx-supply = <&vreg_l4a>; > vdd-1.8-xo-supply = <&vreg_l7a>; > > -- > 2.44.0 > > -- With best wishes Dmitry