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Miller" , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: net: wwan: t7xx: BUG: Unaligned access when loading mtk_t7xx module Organization: m References: Date: Fri, 22 Mar 2024 13:00:22 +0100 In-Reply-To: (Liviu Dudau's message of "Thu, 21 Mar 2024 16:51:27 +0000") Message-ID: <87il1ezdbd.fsf@miraculix.mork.no> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/28.2 (gnu/linux) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-Virus-Scanned: clamav-milter 1.0.3 at canardo X-Virus-Status: Clean Liviu Dudau writes: > I had a > go at guessing that UL registers are at 0x8 and 0x48 offsets and DL > registers are at 0x0478 and 0x04b8, but while that fixes the alignment > exception, I now get a "CLDMA{0,1} queue 0 is not empty" message. I don't think you can assume the register offsets are wrong. It looks more like the device doesn't care about alignment. But given that the driver includes , you can probably replace those unaligned 64bit accesses with two nonatomic 32bit accesses. Bj=C3=B8rn